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TM4C1231 Hibernation not working

Other Parts Discussed in Thread: TM4C1231E6PM

I have the same problem as was discussed before but the prior solution of enabling the VDD3ON bit does not fix it.

I have verified that the 32kHz crystal is oscillating and my system has the VDD connected to VBAT and is always on.

The code gets stuck waiting for the WRC bit after the call to HibernateEnableExpClk( ROM_SysCtlClockGet() );

I also noticed that the VDD3ON bit and/or the CLK32EN bit does not get set if I look at the Hibernate registers with the JLINK debugger.

What's going wrong?

SysCtlPeripheralEnable( SYSCTL_PERIPH_HIBERNATE );
HWREG( HIB_CTL ) |= HIB_CTL_VDD3ON;

HibernateEnableExpClk( ROM_SysCtlClockGet() );
ROM_HibernateClockConfig( HIBERNATE_OSC_LOWDRIVE );

vTaskDelay( MS_TO_TICKS(100) );;  // Allow time for the crystal to power up.

ROM_HibernateRTCSet( 0 );
ROM_HibernateRTCEnable();

// Set the match 0 register for 5 seconds from now.
HibernateRTCMatchSet( 0, 5 );


// Configure to wake on RTC match.
ROM_HibernateWakeSet( HIBERNATE_WAKE_PIN  |  HIBERNATE_WAKE_RTC );


/ Request hibernation. The following call may return because it takes a
// finite amount of time for power to be removed.
ROM_HibernateRequest();

  • Frank Strazzabosco said:

    I also noticed that the VDD3ON bit and/or the CLK32EN bit does not get set if I look at the Hibernate registers with the JLINK debugger.

     Hi Frank, sorry for trivial first step answer.

     Are HIB and WAKE pin pulled UP and at High level?

     When this code return processor is still active or get trapped in some fault?

     VBAT require a finite voltage slope so I added an RC filter to slow down rise time.

  • I thought the HIB pin is a TTL output and does not require a pull-up, but regardless, it never goes high to show that the uC goes into Hibernation.
    I can not get past the call to HibernateEnableExpClk()
    The WAKE pin remains high during this time,
    The code never returns:
    The code gets stuck waiting for the WRC bit in the call to HibernateEnableExpClk( ROM_SysCtlClockGet() );
    VBAT and VDD are stable and unchanging during the attempt to get the uC into Hibernation.
  • The data sheet says that the HIB pin is a TTL output, but apparently that is not the case. It seems to need a pull-up to show the correct state.

    FYI

  • I also found that the function ROM_HibernateRTCMatchSet() is not available in the ROM definitions for some reason. It is conditionally compiled out.
    As far as I can tell I'm compiling with the correct TARGET_IS_TM4C123_RB1 and the function is only available with a TARGET_IS_TM4C129_RA1 in the file rom.h
    Why is that? The data sheet for the TM4C1231E6PM says it should be available.
  • Hello Frank,

    The 32K Clock has to be enabled first before setting any hibernate control register setting which seems is not done in the software correctly. The VDD3ON bit is being set before 32K Clock Enable function call

    HWREG( HIB_CTL ) |= HIB_CTL_VDD3ON;

    HibernateEnableExpClk( ROM_SysCtlClockGet() );
    ROM_HibernateClockConfig( HIBERNATE_OSC_LOWDRIVE );

    Regards
    Amit