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SSI Data Register (SSI0_DR_R) Always Remain Zero

Hi all,

I am doing LCD interfacing using SSI0 communication (8 bit data) in Code Composer Studio Version 6.1.0.00104 .

However, my SSI0_DR_R always remain 0 for whatever value I write.

May I know what is the reason behind that have caused this problem?

For my case, Port A, B, D and E is used to interface with LCD, but I only list PortA function since it is related to SSI0.

void PortA_Init(void)
{
	volatile unsigned long delay;
	SYSCTL_RCGC2_R |= 0x00000001;     						// Enable clock to PORTA
	delay = SYSCTL_RCGC2_R;           						// Delay
	GPIO_PORTA_LOCK_R = 0x4C4F434B;   						// Unlock PortA
	GPIO_PORTA_CR_R = 0xFC;           						// Allow changes for PA2-7
	GPIO_PORTA_AMSEL_R = 0x00;        						// Disable analog function for PA2-7
	GPIO_PORTA_PCTL_R = 0x00000000;   						// GPIO clear bit PCTL
	GPIO_PORTA_DIR_R |= 0x7C;          						// Set PA2-6 output, PA7 input
	GPIO_PORTA_AFSEL_R = 0x00;        						// Disable alternate function for PA2-7
	GPIO_PORTA_PUR_R = 0x00;          						// Disable pullup resistors for PA2-7
	GPIO_PORTA_DEN_R |= 0xFC;          						// Enable digital pins for PA2-7
}

void SSI0_PA2_Init(void)
{
	SYSCTL_RCGCSSI_R |= 0x01;  		// Activate SSI0
	SYSCTL_RCGCGPIO_R |= 0x01; 		// Activate Port A
	while((SYSCTL_PRGPIO_R&0x0001) == 0){};	// Ready?
	GPIO_PORTA_AFSEL_R |= 0x2C;           	// Enable alternate function on PA2,3,5
	GPIO_PORTA_DEN_R |= 0x2C;             	// Enable digital I/O on PA2,3,5
	GPIO_PORTA_PCTL_R &= ~0x00F0FF00;     	// Configure PA2 as SSI0Clk, PA3 as SSI0Fss
	GPIO_PORTA_PCTL_R |= 0x00202200;	// Configure PA5 as SSI0Tx
	GPIO_PORTA_AMSEL_R = 0x00;        	// Disable analog function for PA2-7
	SSI0_CR1_R &= ~0x02;    		// Disable SSI
	SSI0_CR1_R &= ~0x04;	            	// Master mode
	SSI0_CPSR_R = 0x02;			// CPSDVSR = 2
	SSI0_CR0_R |= 0x0F07;      		// SCR = 16, SPH = 0, SPO = 0, FRF = Freescale format, 8-bit data
	SSI0_DR_R = 0x0000;                     // Load 0 into transmit FIFO
	SSI0_CR1_R |= 0x02;          		// Enable SSI
}

void SSI0_SendReceiveData8(uint8_t data)
{
	while((SSI0_SR_R&0x02)==0){};		// Wait until room in Transmit FIFO is not full
	SSI0_DR_R = data;              		// Send data out (Need to check whether need to shift data)
}
  • Hello Chong,

    The SSI Data register is an entry point to both the TXFIFO and RXFIFO. So when you write to the SSIDR, it writes to the TXFIFO. When a read is done of the register then it reads the RXFIFO. So if the LCD's MISO pin is driving 0, then the data shifted in during the Transmit will be read as 0 and hence the SSIDR will always read as 0.

    Regards
    Amit