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TMS570LS3137-EP VCC PLL Power Input Recommendations for the TMS570LS3137-EP

Other Parts Discussed in Thread: LMZ21701

The core power input and the VCC PLL input both take 1.2V.  Is it recommended to power them from the same supply?  If yes, is filtering recommended to create a 1.2V analog voltage rail?

  • Lee,

    It is good to tie core and VCCPLL to the same 1.2V supply. Many of our applications use an unfiltered supply; this choice depends upon the noise you expect on the supply.

     

    Kevin Lavery

  • Kevin,


    We noticed that the evaluation boards use a single 1.2V linear regulator to power both supplies.  However, in our application, we cannot the tolerate the inefficiency of a linear regulator.  Therefore, we must use a switching DC-DC converter to create the 1.2V rail, which will obviously produce significantly more noise than a linear regulator.  We plan on using the TI LMZ21701 SImple Switcher Nano Module to power the core and VCCPLL.  This converter will operate at ~1.5 MHz with ~ 50 mVp-p ripple&noise per the datasheet.  The TMS570 would be the only part powered from this 1.2V rail.  Would you recommend a filter on the VCCPLL input for this application?

     

    Thanks

    Lee

  • Lee,

    With a low frequency ripple on VCC, the PLL will see very little change in the voltage during any reference period. The PLL will adjust its tune voltage to remove the impact of the VCC ripple. As the power-supply noise increases in frequency (when it is very much higher frequency than the reference frequency), the PLL loop cannot respond to the noise. In this case, it will generate some jitter.

    For the PLL, the reference frequency is determined by OSCIN/NR where NR is a divider in PLLCTL1 (and PLLCTL3). At 1.5MHz, the power-supply noise is likely in the same frequency range as the reference frequency. This supply noise should be filtered as it can interact with the PLL.

     

    Kevin Lavery

  • Kevin,

    In our application we have a 16 MHz crystal and we were planning on setting NR to 1.  Therefore, the PLL reference frequency would be 16 MHz.  This is significantly higher than the VCC ripple at 1.5 MHz.  However, there will also be broadband noise on the VCC as well per the nano module power supply datasheet.  Please provide a recommended filter design for the VCC PLL input.

    Also, in the TMS570 datasheet, the VCC PLL power consumption is lumped with the core VCC power consumption.  Please provide the estimate current draw on the VCC PLL power input.

    Thanks,

    Lee

     

  • Lee,

    From a filtering perspective, you want a power-line ferrite in series between the regulator and the VCCPLL pin. On the device side of the ferrite, you need decoupling capacitance in order to prevent spikes that would drop the VCCPLL supply.

    The PLL current is typically under 10mA, but because there are two PLLs, the pin could see 20mA.

     

    Kevin

  • On the smaller TMS5700232BPZQQ1, there isn't a separate VCCPLL pin.
    Do I need to filter the main VCC pins in the same way if I'm using a 20MHz clock and boosting that up to 80MHz via the PLL?
  • Jeffrey,

    The PLL does not intrinsically require a filter. A filter is most useful if you have a very noisy environment. If you expect your circuit to see minimal noise, there is no need to filter the supply.  Without a dedicated pin, the filtered supply would have significant complications (i.e. where to add the filter versus where the noise is expected to be injected from the system). As noted above, you would need to remember to add decoupling on the microcontroller side of the filter.

    Kevin Lavery