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HTU transfer for channel 1 and 2 behaving incorrectly



I am trying to generate three phase sinosidal PWM with the N2HET2 on RM46. N2HET1 is being used for something else.

I am initializing the HTU like so:

	htuRAM2->DCP[0].ITCOUNT = 0x00010000 + SINE_SAMPLE_COUNT;
	htuRAM2->DCP[0].IHADDRCT = (htuRAM2->DCP[0].IHADDRCT & 0x0) | //Clear Register
								0x1 << 23 |		//DIR
								0x0 << 22 |		//SIZE
								0x0 << 21 |		//ADDMH
								0x0 << 20 |		//ADDFM
								0x1 << 18 |		//TMBA
								0x0 << 16 |		//TMBB
								0x28;			//IHADDR
	htuRAM2->DCP[0].IFADDRA = (unsigned int)sine_qtz_lut;

	htuRAM2->DCP[1].ITCOUNT = 0x00010000 + SINE_SAMPLE_COUNT;
	htuRAM2->DCP[1].IHADDRCT = (htuRAM2->DCP[1].IHADDRCT & 0x0) | //Clear Register
								0x1 << 23 |		//DIR
								0x0 << 22 |		//SIZE
								0x0 << 21 |		//ADDMH
								0x0 << 20 |		//ADDFM
								0x1 << 18 |		//TMBA
								0x0 << 16 |		//TMBB
								0x68;			//IHADDR
	htuRAM2->DCP[1].IFADDRA = (unsigned int)(sine_qtz_lut);

	htuRAM2->DCP[2].ITCOUNT = 0x00010000 + SINE_SAMPLE_COUNT;
	htuRAM2->DCP[2].IHADDRCT = (htuRAM2->DCP[2].IHADDRCT & 0x0) | //Clear Register
								0x1 << 23 |		//DIR
								0x0 << 22 |		//SIZE
								0x0 << 21 |		//ADDMH
								0x0 << 20 |		//ADDFM
								0x1 << 18 |		//TMBA
								0x0 << 16 |		//TMBB
								0xA8;			//IHADDR
	htuRAM2->DCP[2].IFADDRA = (unsigned int)(&(sine_qtz_lut[80]));

	htuREG2->CPENA = 0x00000015;
	htuREG2->GC = 0x00010000;

And the N2HET2 module like so:

	uint8_t iter_instr, iter_pins;

	hetREG2->PFR = LRPFC << 8;
	hetREG2->REQENS = 7;
	hetREG2->DIR = (1 << NHET2_PWM_PIN_U) | (1 << NHET2_PWM_PIN_V) | (1 << NHET2_PWM_PIN_W) |
				   (1 << NHET2_PWM_PIN_U_BAR) | (1 << NHET2_PWM_PIN_V_BAR) | (1 << NHET2_PWM_PIN_W_BAR);
	hetRAM2->Instruction[pHET_L00_1].Control = (uint32_t)(arg_period) |
			(hetRAM2->Instruction[pHET_L00_1].Control & 0xFE000000);

	for(iter_instr = pHET_L01_1, iter_pins = 0; iter_instr < 12; iter_instr += 2, iter_pins++)
		hetRAM2->Instruction[iter_instr].Control =
				(hetRAM2->Instruction[iter_instr].Control & 0xFFFFE0FF) |
				(three_phase_pins[iter_pins] << 8);

The N2HET program is as follows:

PWM_PERIOD		.equ 10
PWM_PIN_U		.equ 0
PWM_PIN_U_BAR		.equ 3
PWM_PIN_V		.equ 1
PWM_PIN_V_BAR		.equ 4
PWM_PIN_W		.equ 2
PWM_PIN_W_BAR		.equ 5
INIT_COMPARE		.equ 5
INIT_HR_DELAY		.equ 0

L00:	CNT{next=L01, reqnum=0, request=GENREQ, reg=A, irq=OFF, max=PWM_PERIOD};
L01:	ECMP{next=L04, hr_lr=HIGH, en_pin_action=ON, cond_addr=L02, pin=PWM_PIN_U, action=PULSELO, reg=A, irq=OFF, data=INIT_COMPARE, hr_data=INIT_HR_DELAY};
L02:	MOV32{next=L03, remote=L01, type=IMTOREG&REM, reg=NONE, data=INIT_COMPARE, hr_data=INIT_HR_DELAY};
L03:	ECMP{next=L04, hr_lr=HIGH, en_pin_action=ON, cond_addr=L04, pin=PWM_PIN_U_BAR, action=PULSEHI, reg=B, irq=OFF, data=0, hr_data=INIT_HR_DELAY};
L04:	BR{next=L05, cond_addr=L05, event=NOCOND, reqnum=1, request=GENREQ};
L05:	ECMP{next=L07, hr_lr=HIGH, en_pin_action=ON, cond_addr=L06, pin=PWM_PIN_V, action=PULSELO, reg=A, irq=OFF, data=INIT_COMPARE, hr_data=INIT_HR_DELAY};
L06:	MOV32{next=L07, remote=L05, type=IMTOREG&REM, reg=NONE, data=INIT_COMPARE, hr_data=INIT_HR_DELAY};
L07:	ECMP{next=L08, hr_lr=HIGH, en_pin_action=ON, cond_addr=L08, pin=PWM_PIN_V_BAR, action=PULSEHI, reg=B, irq=OFF, data=0, hr_data=INIT_HR_DELAY};
L08:	BR{next=L09, cond_addr=L09, event=NOCOND, reqnum=2, request=GENREQ};
L09:	ECMP{next=L11, hr_lr=HIGH, en_pin_action=ON, cond_addr=L10, pin=PWM_PIN_W, action=PULSELO, reg=A, irq=OFF, data=INIT_COMPARE, hr_data=INIT_HR_DELAY};
L10:	MOV32{next=L11, remote=L09, type=IMTOREG&REM, reg=NONE, data=INIT_COMPARE, hr_data=INIT_HR_DELAY};
L11:	ECMP{next=L12, hr_lr=HIGH, en_pin_action=ON, cond_addr=L12, pin=PWM_PIN_W_BAR, action=PULSEHI, reg=B, irq=OFF, data=0, hr_data=INIT_HR_DELAY};
L12:	BR{next=L00, cond_addr=L00, event=NOCOND};

So my first wave comes out fine, but the wave on the second channel does not. It feels as if its missing a few samples or something. Is it a problem with the buffer initialization?