Hi,
I am testing the SPI function of the TIVA board, and have a question about the SSI master read function.
At first, I have finished the 'master write function'. It works well. The process is like this:
(1) configure SSI0 as master, SSI1 as slave.
(2) write SSI0 register using SSIPUTDATA command,
(3) then read SSI1 register using SSIGETDATA command).
But ,the 'master read function' does not work after working on it for several days. The process is like this:
1) still configure SSI0 as master, SSI1 as slave
2) write SSI1 register using SSIPUTDATA command
3) read SSI0 register using SSIGETDATA command
There is no data readout out from SSI0 register, because I think there is no data in the SSI0 RX FIFO. Maybe the reason is: SSI0 doesn't read data from SSI0 by sending out fss and clock signals. But how should the SSI0 be triggered to read data, not using SSIGETDATA command?
Thanks! Waiting online.
Qi