TMS570LC4357 F021 Flash

Josh,Which F021 API library have you linked against?

That's the right library.
There's an issue with CCS and flash erase on the cached R5's right now: e2e.ti.com/.../1633378
It could show up outside of CCS if you step through the code that you copy to RAM -- this is the only other obvious possiblity that I can think of.
Maybe you can try the workaround suggested on the above post before executing your bootloader from RAM and let us know if it helps.
If not we'll need to dig further on the status flags.

I have tried modifying the GEL file, and that did not fix my problem.

I tried modifying the linker file to generate the ECC, but I am having problems with that. It gives me the error
CortexR5: File Loader: Verification failed: Values at address 0x00000000F0407FF0 do not match Please verify target memory and memory map.
when I try to program.

Here is the linker file


--retain="*(.intvecs)"


MEMORY
{
VECTORS (X) : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
FLASH_API (RX) : origin=0x00000020 length=0x000014E0 vfill = 0xffffffff
FLASH0 (RX) : origin=0x00001500 length=0x0001EB00 vfill = 0xffffffff
FLASHA (RWX) : origin=0x00020000 length=0x001E0000 vfill = 0xffffffff
FLASH1 (RWX) : origin=0x00200000 length=0x00200000 vfill = 0xffffffff
STACKS (RW) : origin=0x08000000 length=0x00015000
RAM (RWX) : origin=0x08015000 length=0x0006b000

ECC_VEC (R) : origin=0xf0400000 length=0x4 ECC={ input_range=VECTORS }
ECC_FLA0 (R) : origin=0xf0400000 + 0x4 length=0x29C ECC={ input_range=FLASH_API }
ECC_FLA1 (R) : origin=0xf04002A0 length=0x3D60 ECC={ input_range=FLASH0 }
ECC_FLA2 (R) : origin=0xf0404000 length=0x3C000 ECC={ input_range=FLASHA }
ECC_FLA3 (R) : origin=0xf0440000 length=0x40000 ECC={ input_range=FLASH1 }
}

ECC
{
algo_name : address_mask = 0xfffffff8
hamming_mask = R4
parity_mask = 0x0c
mirroring = F021
}

SECTIONS
{
.intvecs : {} > VECTORS
flashAPI :
{
..\Debug\HalCoGen\source\Fapi_UserDefinedFunctions.obj (.text)
..\Debug\bl_flash.obj (.text)

--library= "C:\TI_RTOS\Workspace\HerculesBootloader\F021 Library\F021_API_CortexR4_BE_L2FMC.lib" < FlashStateMachine.IssueFsmCommand.obj
FlashStateMachine.SetActiveBank.obj
FlashStateMachine.InitializeFlashBanks.obj
FlashStateMachine.EnableMainSectors.obj
FlashStateMachine.IssueFsmCommand.obj
FlashStateMachine.ScaleFclk.obj
Init.obj
Utilities.CalculateEcc.obj
Utilities.WaitDelay.obj
Utilities.CalculateFletcher.obj
Read.MarginByByte.obj
Read.Common.obj
Read.FlushPipeline.obj
Read.WdService.obj
Async.WithAddress.obj
Program.obj > (.text)
} load = FLASH_API, run = RAM, LOAD_START(api_load), RUN_START(api_run), SIZE(api_size)

.text align(8) : {} > FLASH0
.const align(8) : {} > FLASH0
.cinit align(8) : {} > FLASH0
.pinit align(8) : {} > FLASH0
.bss : {} > RAM
.data : {} > RAM
}

Josh,
If you use linker generated ECC you also need to change the flash verify setting to 'NONE'.
That's likely the issue w. linker ECC. See processors.wiki.ti.com/.../LAUNCHXL2-570LC43-RM57L:_TIPS
Regarding the GEL workaround, I didn't think of it but you should also add a hot-menu that calls the 'OnFilePreloaded()' function.
(there should be a hot-menu you can extend at the bottom of the GEL already.
Then when testing - you'll want to manually run this GEL through the Scripts menu. This is because if the issue is causing you a problem, it's not during the CCS flash erase sequence so the automatic 'hook' onFilePreloaded() won't trigger. You'll need to trigger manually through the hotmenu.

I restarted CCS and the linker file worker. For the GEL file, I am seeing the output from the OnPreFileLoaded method when I start the debug session, should I still try to run it manually?

John,
Yes, you need to run it manually for the potential problem I'm thinking of. But you need to run it at the right time.
You should run the function *after* you have loaded your program and your program has 'decided' to go execute from RAM.
But you should run it *before* setting any breakpoints or stepping into the RAM.

I added a while(1) loop in my ram code, and when it was running there I tried to execute the gel file, but got the error

InvalidateCache() cannot be evaluated.
Could not write register CP15_ICACHE_INVALIDATE_ALL_TO_POU: execution state prevented access
at CP15_ICACHE_INVALIDATE_ALL_TO_POU=0x01 [tms570lc43xx.gel:358]
at InvalidateCache()

It ran fine after I paused the program in RAM though.

Hi Josh,
Sorry about that. Forgot that the change to the register xml that's needed.
If you open <ccs_install>\ccs_base\common\targetdb\Modules\hercules\cp15_cortexr5f_r1p2.xml
lines 363 and 440 are the start/end of a commented out section. You need to uncomment this, save, exit/restart CCS.
If that doesn't work then try restarting CCS by adding '-clean' to the command line in the icon you use to launch CCS.
(after doing this once you can remove it...)
When you say 'it ran fine' though does that mean it did change the behavior of stopping erase after bank 7 or was it still showing that problem?

I removed those comments and restarted CCS with -clean, but it gives me the same error.
When I said it ran fine, I was talking about the GEL file function. The bootloader still fails at writing to bank 0 sector 8 or higher

Ok thanks for the clarification.
You can also try to use the "Flush All Caches" button on the "Arm Advanced Features" menu (under the main menu 'Tools' when you have
the target cortex R5 selected in a debug session.) This probably achieves the same effect as the script.

I'm not sure why the GEL throw this error if you've changed the XML file unless you have an older version of CCS components.
Unlikely that this is causing the issue but it would be good to know if we're on the latest versions just in case.
You can find this by Help->About Code Composer Studio -> Installation Details..
We're looking for: Debug Server Flash Hercules Emulation
TI Emulators In particular.

The "flush all caches" didn't help.
I am using CCS 6.1.1.00022 with TI Emulators 6.0.14.5

So had a chance to look up those register bits and I can see the puzzle about why SLOCK is reported.
I don't think we have a good picture of what steps you have between
Fapi_issueAsyncCommandWithAddress(Fapi_EraseSector, eraseStartAddr); that returns a success,
and the call to Fapi_BlockProgram.
Would it be possible for you to post this so we can look at it for potential issues?

Also would be good to know if SLOCK is already set *before* you call the block program function.

Did you pass 0xFF or 0xFFFF to Fapi_enableMainBankSectors()?

0xFF was being passed in, I changed it to 0xFFFF and that seems to of worked. Thank you for your help.