1. I have made adc code using sample sequencer 3. using keil 5.13.0.0 & driverlib 2.1.1.71.
2.In ADCClockConfigSet, what is the purpose of ADC_CLOCK_RATE_FULL,
ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 25U);
This function write 0x07 to register ADCSPC (page 844 of tm4c123gh6pm datasheet) which means "ADC sample lags by 157.5°".
What does that mean & how does it make clock rate full.
3. Page 38 of peripheral driver library says that, if ADCReferenceSet is used with ADC_REF_INT then reference is 3V.
However datasheet of MCU says that its 3.3V (voltage at Vdda & vssa). So i think its 3.3V right?
4. I took 100 samples of Internal temperature sensor, ignoring first two samples, the difference between max & min values is around 6 degree. Is it ok to have this large difference. Although datsheet says accuracy could be +-5C. But does that mean samples taken at a time could have such large variation.
Range is 30 to 35.5.
Edit: When turn on debug option goes into error in function ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 25U);
In this function error pint is :
ASSERT(((ui32ClockDiv - 1) & (ADC_CC_CLKDIV_M >> ADC_CC_CLKDIV_S)) == 0);
The left hand expression comes out to be 0x180 & code into error.
5. Below is my code. Are the steps to configure adc are correct:
uint32_t ready_count; uint32_t pui32ADC0Value[1]; uint32_t temp_c; /* enable adc0 */ SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0); while( (!(SysCtlPeripheralReady(SYSCTL_PERIPH_ADC0))) && (--ready_count)); if(0U == ready_count) /* if periph not ready take action */ { } /* disable any sequence, over-under flow, int before setting parasmeters of adc */ ADCSequenceDisable(ADC0_BASE , 3U); ADCSequenceOverflowClear(ADC0_BASE , 3U); ADCSequenceUnderflowClear(ADC0_BASE , 3U); ADCIntDisable(ADC0_BASE , 3U); ADCIntClear(ADC0_BASE , 3U); ADCComparatorIntDisable(ADC0_BASE , 3U); ADCComparatorIntClear(ADC0_BASE , 3U); ADCSequenceDMADisable(ADC0_BASE , 3U); /* set clock & other functions */ ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 25U); ADCReferenceSet(ADC0_BASE , ADC_REF_INT); ADCSequenceConfigure(ADC0_BASE, 3U, ADC_TRIGGER_PROCESSOR, 0U); ADCSequenceStepConfigure(ADC0_BASE, 3U, 0U, ADC_CTL_TS | ADC_CTL_IE | ADC_CTL_END); ADCSequenceEnable(ADC0_BASE, 3U); while(1) { ADCProcessorTrigger(ADC0_BASE, 3U); while(!ADCIntStatus(ADC0_BASE, 3U, false)); ADCIntClear(ADC0_BASE, 3U); ADCSequenceDataGet(ADC0_BASE, 3U, pui32ADC0Value); temp_c = (uint32_t)( 147.5f - ((75U * 3.3f * pui32ADC0Value[0]) / 4096U) ); wait_delay_us(10000); temp[cnt++] = temp_c; if(cnt >= 100U) { while(1); } }