I have a synchronous clock-data pair of RS-422 signals that transmits an SDLC frame of 13 words plus header and CRC... The data is sampled at a rate of 400Hz and transmitted on the falling edge of an externally generated 1.0152 MHz data clock. I am supposed to sample data on the rising edge of the data clock. Between data frames, no data are transmitted which causes me to read all "1"'s or the SDLC "idle" data command. The opening and closing flags have a unique flag byte pattern of a zero (0), six ones (1) and a zero (0). The contents of the rest of the data frame are constrained to five contiguous ones (1) by zero insertion before transmitting. These zero bits are to be removed by me. There is not a slave select coming from the device to indicate "real" data.The data-stream is considered to be a sequence of bits with no arbitrary division into bytes. So, there is no mechanism in place to ascertain when to start shifting data into a receive register and zero insertion is used causing detection of closing flag to be near impossible. What I have done is implement a polling loop and bit bang the data stream. I only have (1) one (us) of time between each clock transition. I believe I am losing data since I do not have enough cycles to detect rising edge of clock, determine value of data, let alone determine if I need to remove inserted zero... Am I right?
void syncDataSteam()
{
while ( ((linPORT->DIN >> PIN_LIN_RX) & 1U) == 1U); // while "idle" data... all "1" bits... wait for "0" bit
while ( ((mibspiPORT1->DIN >> PIN_CS3) & 1U) == 0U); // If clock bit is low... wait for raising edge of clock
g_ln200_buff[0] |= (linPORT->DIN >> PIN_LIN_RX) & 1U; // set bit high/low
g_ln200_buff[0] = g_ln200_buff[0] << 1; // Rotate bits
while ( ((mibspiPORT1->DIN >> PIN_CS3) & 1U) == 0U); // If clock bit is high... sample data on rising edge of clock
g_ln200_buff[0] |= (linPORT->DIN >> PIN_LIN_RX) & 1U; // set bit high/low
g_ln200_buff[0] = g_ln200_buff[0] << 1; // Rotate bits
while ( ((mibspiPORT1->DIN >> PIN_CS3) & 1U) == 0U); // If clock bit is high... sample data on rising edge of clock
g_ln200_buff[0] |= (linPORT->DIN >> PIN_LIN_RX) & 1U; // set bit high/low
g_ln200_buff[0] = g_ln200_buff[0] << 1; // Rotate bits
while ( ((mibspiPORT1->DIN >> PIN_CS3) & 1U) == 0U); // If clock bit is high... sample data on rising edge of clock
g_ln200_buff[0] |= (linPORT->DIN >> PIN_LIN_RX) & 1U; // set bit high/low
g_ln200_buff[0] = g_ln200_buff[0] << 1; // Rotate bits
while ( ((mibspiPORT1->DIN >> PIN_CS3) & 1U) == 0U); // If clock bit is high... sample data on rising edge of clock
g_ln200_buff[0] |= (linPORT->DIN >> PIN_LIN_RX) & 1U; // set bit high/low
g_ln200_buff[0] = g_ln200_buff[0] << 1; // Rotate bits
while ( ((mibspiPORT1->DIN >> PIN_CS3) & 1U) == 0U); // If clock bit is high... sample data on rising edge of clock
g_ln200_buff[0] |= (linPORT->DIN >> PIN_LIN_RX) & 1U; // set bit high/low
g_ln200_buff[0] = g_ln200_buff[0] << 1; // Rotate bits
while ( ((mibspiPORT1->DIN >> PIN_CS3) & 1U) == 0U); // If clock bit is high... sample data on rising edge of clock
g_ln200_buff[0] |= (linPORT->DIN >> PIN_LIN_RX) & 1U; // set bit high/low
g_ln200_buff[0] = g_ln200_buff[0] << 1; // Rotate bits
Is this proper way to bit bang... Or do you have other ideas... Thanks!
