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SPI Clock Problem

Hello,

I want to use an external ADC (AD7885) with the SPI interface utilizing TIVA C Series Connected Launchpad TM4C1294XL. I need an external ADC due to the high project demands.

The external ADC should be clocked with 48MHz. Furthermore, the received data should be stored without CPU intervention (DMA).

I implemented the following code:

int main(void)
{
uint32_t valueX[1];
SysCtlClockFreqSet((SYSCTL_OSC_INT | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480), 120000000); SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2); SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); GPIOPinConfigure(GPIO_PD0_SSI2XDAT1); GPIOPinConfigure(GPIO_PD1_SSI2XDAT0); GPIOPinConfigure(GPIO_PD2_SSI2FSS); GPIOPinConfigure(GPIO_PD3_SSI2CLK); GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3); SSIClockSourceSet(SSI2_BASE, SSI_CLOCK_SYSTEM); SSIConfigSetExpClk(SSI2_BASE, systemClock, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, 40000000, 16); SSIEnable(SSI2_BASE); while(1) { SSIDataPut(SSI2_BASE, 0); SSIDataGet(SSI2_BASE, &valueX[0]); } }

Unfortunately it was not possible to configure the demanded 48MHz clock signal. When I set the Bit rate to 48,000,000, with a system clock frequency of 120 MHz, the clock output (SSI2CLK) amounts 58 MHz. Furthermore the duty cycle is not 50% (see picture).

Microcontroller: Master

D0 = SPI Clock
D2 = Chip select
D4 = RX
D7 = TX

Why is the time, in which the CS pin is high, so long?

I found the following equation in the reference manual:

SSInclk = Sysclock / (CPSDVSR * (1 + SCR))

When I insert the minimum possible parameter I get the following result:

SSInclk = 120x10^6 (2 * (1 + 1)) = 30 MHz

However the duty cycle at 30MHz is also not 50%. I want to receive the data continuously but without CPU intervention, is it possible to connect the DMA to the SPI? I only want to read data from the external ADC.

Is it possible to increase the clock signal of the SPI to 48 MHz?

Thank you in advance for all the help!

  • Hello Markus

    1. You are using a scope in LA mode in which the representation of the signal is based on the logic level and does not take into account rise and fall time variations. It would be actually 60MHz.
    2. Since the core is running at 120MHz and SSI at 60MHz, the time take for the CPU to execute instructions will have a dramatic affect on the time that the CS is held high between transactions. You may want to use the DMA with Advanced Modes to be able to achieve higher throughput
    3. The SSI master can work at 1/2 of the system clock frequency. So for 48MHz the system clock must be 96MHz. Since you are using the TM4C129, you can change the SysCtlClockFreqSet from 120MHz to 96MHz, if the VCO is 480MHz.
    4. Again note that LA mode is only logic representation not analog behavior representation. Keep in mind that a good trace on a PCB has a better signal characteristics when compared to free wires and berg headers.

    Regards
    Amit
  • Hello Amit,

    thank you very much for your informative answer. I measured the signal with an oscilloscope and the duty cycle was exactly 50%. Furthermore, I changed the system clock to 96 MHz, hence the SPI clock amounted 48 MHz.

    Regards
    Markus
  • Hello Markus,

    Glad that you moved to a more precise method for measurement (most users believe that a equipment may never be wrong and we have been taught to think otherwise).

    Regards
    Amit