Interfacing Parallel NOR FLASH 2Gbit to TIVA C EPI

Thach Du

Other Parts Discussed in Thread: TM4C1294NCZAD, TM4C1294NCPDT, TM4C129XNCZAD, SN74LV373A

Need some help interfacing/wiring from TIVA C TM4C1294NCZAD to Micron 2Gbit Parallel NOR FLASH PC28F00BM29EWHA or does TIVA EPI support such device 2Gbit? Thanks.

over 10 years ago

0 Amit Ashara over 10 years ago

TI__Guru**** 244440 points

Hello Thach,

We do have a NOR Flash Reference design for TM4C1294NCPDT (it should be equally applicable for TM4C129XNCZAD)

www.ti.com/.../tidm-tm4cflashsram

This design has been done with Macronix 1Gbit Flash and should scale.

Regards
Amit

0 Thach Du over 10 years ago in reply to Amit Ashara

Prodigy 50 points

Hi Amit, thank you for the information. wondering in the schematic, what the D-Type Latch SN74LV373A is used for and why only from Address A0 to A15, and not A16 to A25?

0 Amit Ashara over 10 years ago in reply to Thach Du

TI__Guru**** 244440 points

Hello Thach,

The memory devices have the address and data bus separate, while the EPI can address the full range by multiplexing the address and data pins. Hence the latch is required to make sure that the address is latched on the AD0-AD15 bus during address phase. Also since it is a 16 bit access to the memory it is AD0-AD15 that require a latch for the address and 16-bit data.

Regards
Amit

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Interfacing Parallel NOR FLASH 2Gbit to TIVA C EPI