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F021_API lib (or any other) CCS compiled library in IAR?

Hello 

I'm running IAR EW and having trouble with the libraries compiled with ccs.

I previously had problems with the safeTI diagnosic library and the tps driver library causing a prefetch abort. That was solved by including the source code in my project instead of having the compiled ccs library.

Now I need FEE and it requires F021 API library. Once F021 lib is added, I get a prefetch abort usually on a context switch (running freeRTOS). Maybe there are registers clobbered with or some other incompatibillity of ccs and iar libraries? Unfortunately I can't find the source for the F021 library, I'm sure what would have solved my problems.

There are two options either TI compiles the F021 library using IAR compiler or I have to find out what's wrong. To start with, is anyone else having problem with the ccs libraries in IAR EW?

Best regards

Henrik Liljedahl

  • I now managed to run my code. I changed to change both optimization from medium to low and processor mode from thumb to arm.

    I suspect some registers are clobbered with. In IAR R4 through to R11 are preserved registers, could that be an issue when including libraries from ccs?

    Are F021 API lib compiled in thumb or arm mode? I found on this forum they are compiled in thumb-2, and that makes me even more confused as I had to compile my code in arm to make it work. I have "generate interwork code" checked optimization ("Makes the IAR compiler capable of mixing ARM and Thumb code").

    Is it possible to have the source code for F021 API lib (I have a NDA)?

  • Henrik,

    Did you compile any interrupt service routines into Thumb2 mode? The processor enters ARM mode on exceptions (this is a CPU 'configuration option' but ARM mode is how the Hercules parts are configured).
    So you at least need to compile any ISRs into ARM mode. Maybe that's your issue w. Thumb2 if you applied to the whole project?

    EDIT: also yes it is possible to get the sources but there is an agreement needed...  Not exactly an NDA..

  • Yes, I applied arm to the whole project, but my code runs ok with thumb as long I don't have the F021 lib included. I assume my ISR are ok then? I don't blame the libs just yet, maybe there is a problem with my code. I'll some more debugging to do next week...
  • The IAR linker is placing veneers in the fist 32KB of flash which is restricted to privileged mode. The task is in user mode so when calling the veneer it's causing a prefetch abort. That is the reason for my code to run in ARM mode but not in Thumb mode (32KB resp 4KB branches).

    The branch is made above the 32KB boundry and the method to be called is also above 32KB, it's only the veneer reside in the first 32KB. I will have to check with IAR support on how to control how the linker generates veneers.

    The above doesn't explain why I have to change optimization to low, maybe I'm having a cocktail of errors. My guess is that more registers are used in higher optimization and they might not be preserved as expected. I'm seeing a similar behaviour as when we discovered the clobbered registers in the FreeRTOS port.

    Hopefully that the code will run ok once I have the veneer problem fixed.

  • My problem relates to the IAR linker only. Under certain circumstances the linker generates veneers the code could do without. Jumps less than +-4MB and no interworking I can't understand why they are there. If veneers had been placed above 32KB I would never have noticed this. I'll check with IAR support. 

    So, no blame on the F021 lib :)

    Best regards

    Henrik