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TMS570LC4357 breakout board connection

Hi,

I am trying to bias the MCU on a BGA breakout board but the JTAG pins are stuck at zero. I'd like to confirm the connection is correct and adequate since not all PS pins/balls are connected

1.2V --> VCC (H10, F10, K12), VCCPLL(P11), consume 67mA with 16MHz external crystal and 52mA without crystal when just powered on

3.3V -->  VCCIO (F14, P6, F6), VCCP (F8), VCCAD (W15), nPORRST (W7), nRST (B17). When nRST is floating, current is 3mA, when nRST is connected to 3.3V directly, the current through 3.3V supply is 44mA. 

GND --> VSSAD (W16, W19), VSS (K10, M8, H8, M12, H12)

All the JTAG pins are connected to XDS100V2 emulator. All other pins are floating. TEST pin is grounded.

Here is the picture of the board.

I got the following JTAG error message during connection test

[Start: Texas Instruments XDS100v2 USB Debug Probe_0]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:\Users\a0273331\AppData\Local\TEXASI~1\
CCS\ti\0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioserdesusb.dll'.
The library build date was 'Sep 4 2015'.
The library build time was '21:59:23'.
The library package version is '6.0.14.5'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).

-----[The log-file for the JTAG TCLK output generated from the PLL]----------

There is no hardware for programming the JTAG TCLK frequency.

-----[Measure the source and frequency of the final JTAG TCLKR input]--------

There is no hardware for measuring the JTAG TCLK frequency.

-----[Perform the standard path-length test on the JTAG IR and DR]-----------

This path-length test uses blocks of 64 32-bit words.

The test for the JTAG IR instruction path-length failed.
The JTAG IR instruction scan-path is stuck-at-zero.

The test for the JTAG DR bypass path-length failed.
The JTAG DR bypass scan-path is stuck-at-zero.

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Test 1 Word 0: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 1: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 2: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 3: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 4: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 5: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 6: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 7: scanned out 0xFFFFFFFF and scanned in 0x00000000.
The details of the first 8 errors have been provided.
The utility will now report only the count of failed tests.
Scan tests: 1, skipped: 0, failed: 1
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 1
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 2
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 3
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 4
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 5
Some of the values were corrupted - 83.3 percent.

The JTAG IR Integrity scan-test has failed.

-----[Perform the Integrity scan-test on the JTAG DR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Test 1 Word 0: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 1: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 2: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 3: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 4: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 5: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 6: scanned out 0xFFFFFFFF and scanned in 0x00000000.
Test 1 Word 7: scanned out 0xFFFFFFFF and scanned in 0x00000000.
The details of the first 8 errors have been provided.
The utility will now report only the count of failed tests.
Scan tests: 1, skipped: 0, failed: 1
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 1
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 2
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 3
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 4
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 5
Some of the values were corrupted - 83.3 percent.

The JTAG DR Integrity scan-test has failed.

[End: Texas Instruments XDS100v2 USB Debug Probe_0]

Is there anything wrong with the connection? Does the current meet the expectation?

Thanks,

  • I confirmed that my emulator is fine till the breakout board connectors.

    The MCU is mounted at the right corner.

    I did check the JTAG connection wiki page and found:

    "If the data read back is all zeros (0x00000000), it is possible there is a power failure on the circuit or one of the JTAG lines has a short to GND."

    I cannot think of any possible short to GND unless the MCU is not powered up properly.
  • Ning,

    That picture was worth a lot ! I'd be surprised if you can get the MCU to work reliably in this type of breakout especially if you have no power supply caps on the board, and all your wire connections are > 6 inches long through the air. It also looks like you don't have nearly enough power and ground wires for this to be fully hooked up.

    I probably would not recommend doing more with this kind of breakout board. Is there a reason that you can't use the launchpad instead?
  • Anthony,

    If you recall, I am having difficulties to erase the flash in my own system

    e2e.ti.com/.../428794

    I decided to break the system to pieces for better debug capability. That is why I am using this breakout board. The board has been used in FA lab for customer returns so I wouldn't question the quality of the board. It can handle 25x25 BGA device, probably OMAP. 

    If the root cause is due to noisy supply or lack of supply pin connected, I will try to hook up more wires.

    In the meantime, do you expect 60mA current from VCC/VCCPLL supply when MCU is idle?

    The JTAG wire over air is not an issue since I can use the wire connect my own system to pass the connection test.

    Thanks

  • Hi Ning,

    Ok, I guess all I can say is continue at your own peril with the breakout board.
    I can't help you any more going down this path - I can tell you it's too much of a time sink just by looking at it.

    Only thing I can recommend is to get the launchpad or the HDK and use this as a working reference. Is there a reason that you can't do that?

    Best Regards,
    Anthony
  • It indeed took a quite bit of time than I expected. To be honest, I am really surprised/frastrated on that because everything should be pretty straightforward on paper.

    I have the lauchpad but I can only use it for my core OS development, not the peripherals. I am building a mini tester using this MCU for high IO count devices so without my own system, I cannot fully validate the software. So, I need to have the right hardware to start with.

    Do you have the layout (gerb file) for the launchpad? Also, do you know the PCB vender name for the launchpad/HDK?

    Thanks
  • Ning,

    Launchpad design files are on this wiki:
    processors.wiki.ti.com/.../LAUNCHXL2-570LC43

    You can get the eagle sources there. The routing was done with Electra 3.x.
    It's is a 6 layer PCB. Which is why I'm certain your flying lead board is a non-starter.

    HDK files are available in the tool folder for the HDK on ti.com. QJ Wang is the person to contact for HDK.

    If I were you I would try to build the test board using the launchpad and it's expansion headers if possible.
    It will save you a lot of frustration - especially if you've not worked with a large pin count BGA device before. Pretty much every IO pin of the device is available on one of the connectors of the launchpad.

    -Anthony