RM57Lx SCI DMA Tx sending only zeroes

rohit kumar26

Prodigy 170 points

Other Parts Discussed in Thread: HALCOGEN

4503.sci_dma.zip

Hello,

i am trying to implement SCI rx and tx using DMA on RM57Lx based development kit.

i am trying to use the example given by halcogen as base.

but Tx is only sending zeroes (veryfied using logic analyzer) and Rx is only receiving zeroes (i am not sure if it is receiving at all).

Tx and Rx using sciSend(), sciReceive() works using interrupt.

i am attaching my project (halcogen config is also included).

g_dmaCTRLPKT1.SADD

g_dmaCTRLPKT1.DADD

looks good too holding address of valid arrays.

any help is appreciated.

over 9 years ago

0 Sunil Oak over 9 years ago

TI__Mastermind 49120 points

Rohit,

Refer to this app note and example code available from this link.

Regards,

Sunil

0 rohit kumar26 over 9 years ago in reply to Sunil Oak

Prodigy 170 points

Hello Sunil,
sorry to ask this basic question, but
the example is made for TMS570LS1227ZWT.
how can i adapt it for RM57Lx?

0 rohit kumar26 over 9 years ago in reply to Sunil Oak

Prodigy 170 points

Hello Sunil,

i tried using the example you suggested but i am still getting zeroes transmitted via DMA.

is it because of my memory map? DMA is not able to access the address of transmit buffer?

the transmit buffer has address 0x080017D0 which seems to be in KRAM area according to my sys_link.cmd file

i.e.

KRAM (RW) : origin=0x08000800 length=0x00000800

RAM (RW) : origin=(0x08000800+0x00000800) length=(0x0007F800 - 0x00000800)

can you suggest what could be problem?

0 Sunil Oak over 9 years ago in reply to rohit kumar26

TI__Mastermind 49120 points

Rohit,

The RM57 is a cached processor, meaning that all you data setup by the CPU is stored in the data cache until it needs that space to store more data. This cache is not available for other bus masters (including DMA), which is why the DMA is transferring zeros. You need to change the default MPU setting using HALCoGen to make the RAM area "write-through" instead of the default "write-back".

Let me know what you observe.

Regards,
Sunil

0 rohit kumar26 over 9 years ago in reply to Sunil Oak

Prodigy 170 points

Hello Sunil,

Thank you for the reply.
can you pin point the setting i need to change?
in halcogen
RM57L843ZWT-> R5-MPU-PMU tab
which region i need to change and to which type and which permission?

0 Sunil Oak over 9 years ago in reply to rohit kumar26

TI__Mastermind 49120 points

The default setting for region 3 (for CPU SRAM) is:

Change that to:

0 rohit kumar26 over 9 years ago in reply to Sunil Oak

Prodigy 170 points

Hello Sunil,

DMA seems working after the changes you mentioned in PMU.
but i cannot get any interrupt after data receive, dmaGroupANotification() does not get called.
but interrupt happens in transmit data and i get block transfer interrupt but i do not get block transfer in receive mode.

can you provide an example for DMA receive too?
thanks

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RM57Lx SCI DMA Tx sending only zeroes