Question about DMA configuration in Tiva-C chip TM4C1294

Hi,

When I read TivaWare example project (dma uart echo), it has below description on SW channel DMA. I feel it is not as usual for a DMA to count memory in bits. I thought it should be in word (32-bits) or byte. Can any Tiva-C expert give me a confirmation the following is true?

Thanks,

    //
    // Configure the control parameters for the SW channel.  The SW channel
    // will be used to transfer between two memory buffers, 32 bits at a time.
    // Therefore the data size is 32 bits, and the address increment is 32 bits
    // for both source and destination.  The arbitration size will be set to 8,
    // which causes the uDMA controller to rearbitrate after 8 items are
    // transferred.  This keeps this channel from hogging the uDMA controller
    // once the transfer is started, and allows other channels cycles if they
    // are higher priority.
    //
    ROM_uDMAChannelControlSet(UDMA_CHANNEL_SW | UDMA_PRI_SELECT,
                              UDMA_SIZE_32 | UDMA_SRC_INC_32 | UDMA_DST_INC_32 |
                              UDMA_ARB_8);