Minimum operating clock frequency for TIVA TM4C1294XL

Upon my 2nd read of your post I noted TM4C1294XL.    My cut/paste (below) is from TM4C123xx - but may suggest (where) you should search to find similar for your MCU.   (data I've provided springs from the rear of the MCU Manual (cheap-seats))

Several "gotchas" w/in this data:

• should you employ the ADC - the MCU's system clock must be 16MHz, minimum
• w/out engaging the PLL this chart specs 4MHz as minimum system clock - many code examples illustrate system clock setting w/out the PLL
• suspect that to reduce system clock (to lowest) you must employ a 4 or 5MHz external xtal and NOT enable the PLL.   Your board likely includes a higher frequency xtal - and that is likely to limit the lowest system clock you can achieve
• this data may have changed for your MCU - you must check
• it is possible to run from the low-frequency (~32KHz) internal clock.   Code execution will be drastically slowed - yet power draw is much reduced.

You've not explained your desire for, "minimal system clock speed."   Should "power consumption" be your driving issue - there are multiple, other methods to reduce such - and avoid so drastic a slowing of code execution...

Hello Jesper.

To add to what cb1 has mentioned, lowering of the system clock can be done upto VCO of 480MHz divided by the maximum PSYSDIV value of 1024. This would be ~468KHz. However at such low system frequency, peripjherals like ADC, USB and Ethenrent would not work. Also a lot of other peripherals like I2C and UART would also not be functionally possible.

State Intent first, followed by the application case!!!

Regards
Amit

Hi Amit,

Good that you added to my "cautions."

Indeed it is rare that poster's "justify and/or explain" the logic behind their desires.
Somewhere we've read that, "Poster Guidelines" may correct - yet that's (too hard) and endless (back/forth...{as here}) is judged superior...

Power consumption is one of the driving reasons. I have studied both the hibernate and sleep modes on the processor. Hibernate is very low power, but internal memory is lost as I understand it. I would like to be able to sleep the processor, wake up a handful of times per second, do some work, then go back to very low power levels.

Hello Ler,

I would suggest deep sleep where clock scaling can be used instead of using sleep mode where the RUN mode clock setting is used. This way in periods of inactivity the clock shall be scaled down to help drive down current, while in RUN mode the performance shall come back.

Regards
Amit

Amit,

Thanks for the great input. From the data sheet, if I am not using the PLL, it says the minimum clock frequency is zero. Does this mean the part is static? Could I turn the clock complete off, and still maintain memory, etc, then turn clock back on to get performance back

Hello Ler,

Which section of the data sheet states that minimum clock is 0!!! In Deep Sleep mode the clock gating can be enabled to stop clock to a module and this can be switched ON by the automatic hardware control when it comes back to RUN mode.

Regards
Amit

Section 32.9.5 Main Oscillator Specifications (Table 32-23)

Hello Ler,

Thanks for the pointer. That is when the uC indicates to external clock distribution circuit that the clock on the pin can be shut off. This is however has to be handled by the firmware before making a low power or clock change. Such a clock transition would not be an automated transition.

I would suggest using the Main Crystal as is with the Deep Sleep function.

Regards
Amit

Hello Amit,

Can you point me to code that I can experiment with the "Deep Sleep" function?

Thank you.

LER

Hello Ler,

The following code for EK-TM4C1294XL would be useful for deep sleep configuration.

D:\ti\TivaWare_C_Series-2.1.1.71\examples\boards\ek-tm4c1294xl\sleep_modes

Regards
Amit

Hello Amit,

Thanks to you I have made good progress here today. I have the board going into deep sleep mode and the LDO set to 0.9V. At 3.3V, the processor is pulling right at 3.8mA which is pretty low. Looking in the data sheet, I'm guessing I may not have all of the peripherals off? Any guidance on how I go about shutting off peripherals?

Thank you.

LER

Hello Ler

What is the wakeup source? That peripheral cannot be shut down in low power mode. Also if clock switching is involved and the wakeup source is a timer or SysTick then clock values have to be adjusted so that the timing in ms or us is correct and not changed due to the frequency change.

Once we ascertain this then the SYSCTL.DCGCxxx registers can be cleared for peripherals that can be shut down and set for peripherals that are needed along with ACGC register bit being set in SYSCTL.DSCLKCFG register to auto enable clock shutdown to peripherals not required.

Regards
Amit

Hello Amit,

The wake up source will be USR SW 1, so I will have to keep that GPIO on. From what I can tell, to turn off each peripheral, do I use the:

ROM_SysCtlPeripheralDisable(SYSCTL_PERIPH_ADC0); // disable ADC0

call?

Thank you.

Loren

Hello Loren,

Yes. So what you need to do is call SysCtlPeripheralDeepSleepEnable for the GPIO to be used as wakeup source and SysCtlPeripheralDeepSleepDisable for all other peripherals. Then call SysCtlPeripheralClockGating(true) to auto manage the clock setting between run and deep sleep mode.

Regards
Amit

Hello Amit,

After multiple calls to turn off all unused hardware, I have the processor current at 3.53mA, at 3.3V.  My understanding of the data sheet says that if I clock it down to 30 KHz, I could achieve even lower stand-by power.  What call would I make to set the processor to 30 KHz?

Thank you.

Loren

Hello Ler

The Peripheral Driverlib Guide has the API call described as SysCtlDeepSleepClockSet which will allow to change the clock source for deep sleep.

Regards
Amit