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RM48L952 PBIST Issue

Erik von Hesse
Prodigy 150 points
Other Parts Discussed in Thread: RM48L952

I am trying to run a PBIST exactly following the "7.6.2 Example 2 : Configuration of PBIST Controller to Run Self-Test on ALL RAM Groups" from SPNU503B.

The test ends with a fault. Fail Status Registers read as follows:

FSFR0: 0x00000001

FSFR1: 0x00000000

FSRC0: 0x00000002

FSRC1: 0x00000000

FSRA0: 0x00000000

FSRA1: 0x00000000

RAMT: 0x0E002004

The content of RAMT tells that the failed RGS is 14 (0x0E). According to table 2-5 in secttion 2.2.4.1, there is no RAM group with RGS 14. Is there anything wrong with the documentation or the internal silicon algorithms of the RM48L952?

  • 0
    TI__Mastermind 49120 points
    Erik,

    The RAM group with RGS=0xE is not available on this part. You need to configure the RINFOx registers with OVER=0 in order to only select the RAM groups that are applicable to this part number.

    We will update the section in the TRM PBIST chapter to include a note to this effect.

    Regards,
    Sunil
  • 0 in reply to Sunil Oak
    Prodigy 150 points

    Sunli,

    this almost fixed the issue. What I am trying now is testing all the different memory type in three PBIST test runs: ROM, single ported RAM and dual ported RAM, and I have tried all algorithms that match each of the selected memory type. I have no issues with ROM and single ported RAM algorithms. However, if i select all dual ported RAMS (0x02CE7FDC) and either try PMOS open (0x00001000), RAM retention 0 (0x00100000) or RAM retention 1(0x01000000), I am getting a fault.

    Are these tests supposed to work? I don't see a real issue here as the majority of the tests work fine, but I need a semi-official statement for my customer.

  • 0 in reply to Erik von Hesse
    TI__Mastermind 49120 points
    Erik,

    There are some differences in the applicable RAM groups versus the ones you have chosen for the patterns selected. Please refer to table 2-6 on page 103 of SPNU503b to identify the RAM groups applicable for each test pattern.

    Regards,
    Sunil
  • 0 in reply to Sunil Oak
    Prodigy 150 points

    Sentil,

    You are correct, but the table causes some further confusion: Algorithms powerup_invpowerup (0x40000000, 0x80000000) are applicable to RAM groups that do not exist (above group #28). Should these algorithms be used at all?

    Furthermore, Table 6-26 of the document SPNS177D (for RM48L952) lists two additional RAM groups for USB (26, 27). Which algorithms can be applied to these USB RAM groups?

    Regards,

    Erik

  • 0 in reply to Erik von Hesse
    TI__Mastermind 49120 points

    Erik,

    The USB memory groups are missing from the table. I have filed documentation feedback for this.

    RAM group 26 is a single-port RAM, so all the algorithms applicable to this type of memory can be run on this group.

    Likewise, RAM group 27 is a dual-port RAM and all tests applicable to dual-port RAMs can be run on this group.

    Algorithms power_invpowerup are not available for users to run, please ignore these. These two rows will be removed from the table as well.

    Regards,

    Sunil