Hey all,
I have made some modifications to the usbdcdc.c example code from the Tivaware USB Library to add bulk DMA transfer functionality. The transfers are working correctly and all is well.
My only problem currently is that I cannot figure out which interrupt service routine is being called for when the DMA transfer is complete. I set up the DMA transfer according to section 21.3.6.3 of the TM4C1294NCPDT datasheet where it talks about using DMA transfers with bulk endpoints.
From the datasheet:
"
The DMA controller should be programmed to perform a burst DMA read of the maximum size
of packet for the endpoint (512 bytes for high speed, 64 bytes for full speed) when the DMA
request line for the endpoint transitions from low to high. The controller should keep performing
these burst reads on each DMA request until the entire data block has been transferred. (The
last burst may however be of less than the maximum packet size). It should then interrupt the
CPU.
"
I have been looking everywhere and it is unclear where/when the DMA peripheral interrupts the CPU. If someone could point me in the right direction that would be great!
Cheers,
Bryan