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BOOST-DRV8305 SPI

Robert Rice1
Prodigy 150 points

Other Parts Discussed in Thread: EK-TM4C1294XL, BOOST-DRV8711, DRV8305

Hi,

I am trying to get my new BOOST-DRV8305 setup with an EK-TM4C1294XL LaunchPad but I can't get the SPI communications to work - no data out on SPO pin. I have PWRGD, ENGATE and WAKE high. SCLK, SCS and SDI all look good but I can't read any registers.

It seems the SPI protocol is the same as for the BOOST-DRV8711 and I have a few of those boards working.

Is there something I'm missing in my setup?

Why do these chips need motor power to communicate with the host?

Thanks,

Bob Rice

  • 0
    TI__Guru**** 244440 points
    Hello Bob,

    Can you please share the information on which pin is being used for SPO?

    Regards
    Amit
  • 0
    TI__Mastermind 21320 points

    Hi Bob,

    Can you send a scope capture of the SPI frame?

    The device needs power because it generates its own internal logic rail from the main supply.

    Note that SCS is active low for the DRV8305 and data in is clocked on falling SCLK edges.

  • 0 in reply to Nicholas Oborny
    TI__Guru**** 244440 points
    Hello Nicholas

    Since the MOSI pin is not changing from the default state, I suspect that it may not have been configured correctly on the uC

    Regards
    Amit
  • 0
    Prodigy 150 points
    Hi Nicolas,

    Thanks for the quick reply. I did not notice that chip select was inverted for BOOST-DRV8305 so that is probably my problem.

    The data sheet document SLVSCX2 shows an inverted chip select but the user guide document SLVUA18 does dot show it inverted in the pinout diagram. A user will have to look carefully at the schematic diagram to see that the chip select is an inverted input.

    Thanks,
    Bob Rice

  • 0 in reply to Robert Rice1
    TI__Mastermind 21320 points

    Thanks for the feedback Bob. I will look to get the User Guide document updated.

  • 0
    Prodigy 150 points
    Hi Nicholas,

    If you find someone to update the document, then I’ve found a few other documentation errors:

    SLVSC40D –JUNE 2013–REVISED JANUARY 2014 - The Back EMF sample time threshold (SMPLTH) is specified as 3 bits in the Torque register, but I can only read back to verify the low order 2 bits so I suspect the implementation is only 2 bits.

    SPMU365A–March 2014–Revised March 2014 - Table 2-4. X11 Breadboard Adapter Even-Numbered …
    Pin 42 - PD7 - Should mux SSI2XDAT2 not SSI1XDAT2
    Pin 44 - PD6 - Should mux SSI2XDAT3 not SSI1XDAT3
    Pin 48 - PD1 - Should mux SSI2XDAT0 not SSI1XDAT0
    Pin 50 - PD0 - Should mux SSI2XDAT1 not SSI1XDAT1
    Pin 54 - PP0 - Should mux SSI3XDAT2 not SSI1XDAT2
    Pin 56 - PP1 - Should mux SSI3XDAT3 not SSI1XDAT3

    Document SLVU967-May 2014 shows reverse polarity in the pinout diagram on page 3 for the Motor Supply connection. Anyone referring to this illustration and not checking the silkscreen will blow the board.

    Thanks,
    Bob Rice

  • 0 in reply to Robert Rice1
    TI__Guru**** 244440 points
    Hello Bob

    I believe you are referring to the older version of SPMU365A. It has already been revised in May 2015 and the document is version SPMU365B

    Regards
    Amit