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ETMDATA[8:31] behavior after reset

Other Parts Discussed in Thread: TMS570LC4357

Are the ETMDATA[8:31] balls on the TMS570LC4357 active after PORRST? They multiplexed with other peripherals and it appears the ETMDATA is driven when PORRST goes high.  I am particularly interested in ball E12 and E11 as they are multiplexed with EMIF_OE and EMIF_DQM1.  The outputs are going low after reset, which is the active state of the EMIF signals.

Is there a document available which explains the operation of the ETM infterface?

Tom

  • Tom,
    From what I recall and you can confirm in a simple way by looking at the pin name - is that only the lower 8 pins of ETM default to the ETM function after reset.
    The default function is always listed as the first signal in the full pin name ... i.e. <sig1>/<sig2>/sig<3> pin has <sig1> as the default function.
    If you need to trace an issue through a warm reset you'll need to limit yourself to just ETMDATA[7:0] which isn't a very high bandwidth.
    I've tried tracing through a reset before and it is tricky because the ETM needs to be configured again. If memory serves me I was able to halt the CPU after a warm reset on the HW reset vecotr, configure the ETM, then run from there. Power on reset isn't really feasible without some modification to the code, for example a "B Self" at the reset vector, which requires the emulator to attach and kick the CPU out of this loop to the real reset vector. This would give you a chance to trace the code through the power on reset sequence - although it won't be the exact same timing because of the B Self but at least the state of the device should be the same.
    There isn't really a good document explaining all this, unfortunately.
  • According to table 3-28 of the TMS570LC4357 datasheet SPNS195A, the default function of ball E12 is ETMDATA[13] and ball E11 is ETMDATA[14]. It is my understanding the default function is multiplexed to the ball after reset. I have pull up resistors to overcome the internal pulldown resistors of the device. Both outputs are high while PORRST is a logic low. Both outputs go low with the rising edge of PORRST. The outputs remain low until the software configures the balls to the EMIF function. This is telling me the ETMDATA actively drive the ball after reset. Please confirm this is the case.
  • Tom,
    You're right - the ETM is the default function not the EMIF - so ETM is in control after reset and it's data would be driven onto the pin.
    Is your concern more about using the ETM after reset, or about ETM interfering w. EMIF?
  • BTW - this link is to the ARM document for the ETM module that is on the TMS570LC4357: infocenter.arm.com/.../DDI0469B_etmr5_r0p0_trm.pdf
    it is compliant to ETMv3.3 which is documented in more detail here:
    infocenter.arm.com/.../IHI0014Q_etm_architecture_spec.pdf
    But according to the 1st doc, the ETM is disabled by default coming out of reset. So I would expect 0's on the pins.