Other Parts Discussed in Thread: HALCOGEN
I'm referring to example_spi_Master_Slave.C
What is the SPI clock rate configured? and what can be the maximum SPI clock rate that can be configured and how?
C:\ti\Hercules\HALCoGen\v04.05.01\examples\TMS570LS12x_11x
You can set the clock from HalCoGen, without writing any code CCSv6.
for more information on configuring the peripheral, read the user guide in the SPI section:
I do not know which is the maximum speed of the SPI clock, so you'll have to do some research, we'll let you know if I find something, maybe some expert SPI, can help! hehehe :)
Best Regards
Martin
Martin, Thanks again very much!
The Maximum SPI clock rate depends a bit on the SPI module and device but normally is in the range of 20-25MHz for SPI master mode. So a check of the datasheet is required.
For the 1224:
But there is a footnote, which is a reminder that the maximum SPI clock also depends on the internal bus clock VCLK and the output load:
In this case the footnote says:
(4) When the SPI is in Master mode, the following must be true:
For PS values from 1 to 255: tc(SPC)M ≥ (PS +1)tc(VCLK) ≥ 40ns, where PS is the prescale value set in the SPIFMTx.[15:8] register bits.
For PS values of 0: tc(SPC)M = 2tc(VCLK) ≥ 40ns.
The external load on the SPICLK pin must be less than 60pF.
60pF is a pretty high load so it probably isn't a problem unless there are many devices on the bus. And the requirement related to VCLK means that to run at 25MHz (40ns) VCLK must be 50MHz or 75MHz or 100MHz...
Because this particular device (TMS570 version) is only rated to 180MHz, VCLK of 100MHz, 75MHz or 50MHz are not actually possible if the CPU runs at 180MHz because VCLK is divided from the CPU clock.
One could reduce the CPU clock to 150MHz to get a 25MHz SPI clock. Or one could chose to run the SPI clock at something like 180MHz / 8 = 22.5MHz - which I think is the more likely scenario. but the right choice has to be made for the application.
