Issue with TMS570LS3137 EMAC, no Ethernet packet output

Simon,
Can you make your same setup work with the lwip example posted processors.wiki.ti.com/.../HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration
It would be good to know if this example works for you -- before we go through the things that may break by changing the example.
Because it could be something as simple as a problem in how you have Wireshark setup... for example.

Anthony,

thanks for your prompt reply!

I took the lwip example as my reference. The lwip example is working well with my Wireshark setup. I think, I almost make the same setup work with the lwip example. 

I use the other computer to ping my device, it could receive "ICMP ping request"  packet;  in turn, it could generate "ICMP ping reply" data, which is checked with the help of Tx Descriptor's buffer pointer; and finally, EMAC Tx-interrupt happens. The whole procedure could repeat again and again with the new pings coming in.

Simon

Hi Simon,

That's great! Then as long as you keep the hardware the same, we should be able to focus on software issues.

I don't know how much you changed in the software. Did you create a new HalCoGen project from scratch? If so then one of the first things we need to check is whether there is a pinmux problem.
If you can compare the pinmux in the working version against your version that would be a good starting point.

I would say also please check and compare not only the PINMUX tab. And specifically, do you have the RMII v.s. MII setting correct to match the board.

Then check that the clocking to the Ethernet module is the same. This is the VCLK3 clock on the LS3137.

After that, I would check the EMAC Global tab for any differences. For example did you uncheck something critical?

Those are things I'd start with. Based a bit on just comparing what is working with what isn't working.

Another thing you might try is looking at the statistics that the EMAC keeps - to see if there are any useful errors which are being logged...

Best Regards,
Anthony

Hi Anthony,

With your help, I found a bug in Ethernet padding. For a short packet like ARP reply, there's less padding bytes. Now, ARP reply is working.

But, I encounter another issue that EMAC can only receive broadcasting packets with Source Address being FF:FF:FF:FF:FF:FF; and can not receive any unicasting packet, unless I enable Promiscuous Channel. In reality, I enable RxUnicast in EMAC initialization, shown in the source code below.

Any advice on the new issue?

thanks!

Simon

error_t tms570EthInit(Interface *interface)
{
// uint16 partnr_ablty = 0U;
// uint32 phyduplex = EMAC_DUPLEX_HALF;
error_t error = NO_ERROR;
uint32 channel;
volatile uint32 delay = 0xFFFU;
rxch_t *rxch;

/*Initialize the EMAC, EMAC Control and MDIO modules. */

EMACInit(EMAC_CTRL_0_BASE, EMAC_0_BASE);
MDIOInit(MDIO_BASE, MDIO_FREQ_INPUT, MDIO_FREQ_OUTPUT);

while(delay != 0U)
{
delay--;
}

EMACRxBroadCastEnable(EMAC_0_BASE, 0);

/*Set the MAC Addresses in EMAC hardware */
EMACMACSrcAddrSet(EMAC_0_BASE, nicDriverInterface->macAddr.b);
for(channel=0U;channel<8U;channel++)
{
EMACMACAddrSet(EMAC_0_BASE, channel, nicDriverInterface->macAddr.b, EMAC_MACADDR_MATCH);
}

//PHY transceiver initialization
error = dp83640_init(interface);
//Failed to initialize PHY transceiver?
if(error) return error;

// /* Link Setup */
// if(Dp83640AutoNegotiate(MDIO_BASE, EMAC_PHYADDRESS,
// (uint16)((uint16)DP83640_100BTX | (uint16)DP83640_100BTX_FD
// | (uint16)DP83640_10BT | (uint16)DP83640_10BT_FD)) == TRUE)
// {
// (void)Dp83640PartnerAbilityGet(MDIO_BASE, EMAC_PHYADDRESS, &partnr_ablty);
//
// /* Check for 100 Mbps and duplex capability */
// if((partnr_ablty & DP83640_100BTX_FD) != 0U)
// {
// phyduplex = EMAC_DUPLEX_FULL;
// }
// }
// else
// {
// error = ERROR_FAILURE;
// }

/*The transmit and receive buffer descriptors are initiallzed hee.
* Also, packet buffers are allocated to the receive buffer descriptors.
*/

tms570_EMACDMAInit();

/*Acknowledge receive and transmit interrupts for proper interrupt pulsing*/
EMACCoreIntAck(EMAC_0_BASE, EMAC_INT_CORE0_RX);
EMACCoreIntAck(EMAC_0_BASE, EMAC_INT_CORE0_TX);

EMACRxUnicastSet(EMAC_0_BASE, (uint32)EMAC_CHANNELNUMBER);

EMACDuplexSet(EMAC_0_BASE, (uint32)EMAC_DUPLEX_FULL);
EMACNumFreeBufSet(EMAC_0_BASE,(uint32)EMAC_CHANNELNUMBER , (uint32)TMS570_ETH_RX_BUFFER_COUNT);

/* Enable Transmit and Transmit Interrupt */
EMACTxEnable(EMAC_0_BASE);
EMACRxEnable(EMAC_0_BASE);

/* Enable Receive and Receive Interrupt. Then start receiving by writing to the HDP register. */
rxch = &rxchptr;
/* Write to the RX HDP for channel 0 */
EMACRxHdrDescPtrWrite(EMAC_0_BASE, (uint32)rxch->active_head, (uint32)EMAC_CHANNELNUMBER);

EMACMIIEnable(EMAC_0_BASE);
EMACTxIntPulseEnable(EMAC_0_BASE, EMAC_CTRL_0_BASE, (uint32)EMAC_CHANNELNUMBER, (uint32)EMAC_CHANNELNUMBER);
EMACRxIntPulseEnable(EMAC_0_BASE, EMAC_CTRL_0_BASE, (uint32)EMAC_CHANNELNUMBER, (uint32)EMAC_CHANNELNUMBER);
//Force the TCP/IP stack to check the link state
osSetEvent(&interface->nicRxEvent);
//TMS570 Ethernet MAC is now ready to send
osSetEvent(&interface->nicTxEvent);

//Successful initialization
return error;
}

Simon,

I would check this section of the TRM: 29.2.11.2 Receive Channel Enabling, and look at the control registers that it talks about to see how you have filtering setup.

Hi Anthony,

any update?

Simon,

Did you check the filtering configuration?