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Interfacing external flash memory with Tiva TM4C123GH6PGE

Bharath Asokan
Prodigy 130 points
Other Parts Discussed in Thread: TM4C123GH6PGE

I have a Tiva C series TM4C123GH6PGE uC, where i have interfaced 4Mb external flash memory to the uC. I'm trying to write the data onto the flash memory as mentioned in its datasheet as pulling the chip and write enable low and making output enable as high.I have attached the flash datasheet here. I'm not considering the timing delay given in the timing diagram. I looked onto a tutorial from TI community where TMS320C6000 is interfaced to flash via EMIF, bu Tiva C Series doesnt have EMIF, how to interface and carry out read and write operation, are there any tutorials? and one final doubt is that , is it necessary to pull up the Chip Enable line of flash? Please help me out.

Flash memory M29W320DT70N6E-Micron.pdf

  • 0
    TI__Guru**** 244400 points
    Hello Bharath,

    The memory interface is available on TM4C129x devices and is called EPI. There are reference designs already available that show how to interface SDRAM, SRAM and FLASH memory to the TM4C129 using EPI. Also these reference designs are supported with software examples.

    www.ti.com/.../tidm-tm4cflashsram

    As far as I know there is a lengthy sequence to program a flash. How is your software being structured for the TM4C123 device?

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Prodigy 130 points
    Thanks for the quick response, this is what i was actually looking for, can the project files shown being imported, in the pdf mentioned available for download?
  • 0 in reply to Amit Ashara
    Prodigy 130 points
    Is the EPI available for TM4C123GH6PGE uC?, because i searched the whole data sheet for EPI, and none of the results showed up.
  • 0 in reply to Bharath Asokan
    TI__Guru**** 244400 points
    Hello Bharath,

    No. It is not available for TM4C123.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Guru 47900 points

    You are (likely) to exhaust most all of your GPIO in the attempt to interface to any parallel Flash, external memory.     As Amit's well noted - TM4C123 was not intended for that role.

    If you can live w/slower "reads/writes" you may consider external, Serial Flash memory - which proves far more suitable - for TM4C123 class devices...

    Unstated is how you read of "EPI" yet "missed" the (strong) TM4C129 "link/hook."

  • 0 in reply to cb1
    Prodigy 130 points
    No,changing from parallel to serial would mess up the whole pin configuration in the project. Is there any way around i can find tutorials for the uC i mentioned to write and read data in parallel manner? I will attach my code here, can anyone say me where am i going wrong?
  • 0 in reply to Bharath Asokan
    Guru 117855 points

    Bharath Asokan said:
    No,changing from parallel to serial would mess up the whole pin configuration in the project

    So - do you really care (which) poison you're about to drink?

    Do you realize that a "normal" memory will (likely) contain 16 data bits, and 20 - 24 (or more) address bits?  And strobe signals.   And your "non-EPI capable" TM4C123 has its ports "hog-tied" to mere 8 bit width?   Thus - you may have to perform FIVE Separate Port writes - just to present data & address to your memory.  And (then) you'd require (yet another) port to generate the required strobes.   Does that sound, "Mess up free?"

    Now - noting that - does "changing from parallel to serial" sound that bad?    Really?   A "messed up" pin configuration pales in the face of your "SIX Port Loads" for each read/write!   Again - TM4C123 was never designed w/such "connect to parallel memory" intent!   (TM4C129 was)

    Might the (real) mess here be your "miss" of TM4C123's absence of EPI?

  • 0 in reply to cb1_mobile
    Prodigy 130 points
    I was unaware of the above facts and thanks for the mentioning those. We also used parallel SRAM,which works perfectly , i accept the the above mentioned points, but in my code am i doing it correctly? Are the timing given in the flash datasheet should be taken into consideration which is in ns range?
  • 0 in reply to Bharath Asokan
    Guru 117855 points

    Bharath Asokan said:
    Are the timing(s) given in the flash datasheet (proper) for this MCU?... 

    May we (start) w/your parallel SRAM?   Prior post seemed to surprise you w/the requirement for a cascade of "Port Reads,Writes" just to address a single (byte or word) of external memory.   Yet - shouldn't that exact requirement have been revealed - during your "perfect" working of your parallel SRAM?   That's a rather huge inconsistency w/in your logic & issue framing - is it not?

    With the admittance of your external, parallel SRAM as, "fact in evidence" (albeit a very late arriving one) your addition of parallel flash makes vastly more sense.   (although you still will "enjoy" the slowest memory access times on recent record!)   {due to 8 bit/port limitation of TM4C123 - can you say, "Load Port, Write Port" - and repeat - SIX Times?} 

    Your "perfect working" of that parallel SRAM telegraphs that someone w/in your team (likely) read, understood & complied w/SRAM timing & signal spec.   Why cannot you employ that exact same method w/your parallel Flash?   Pardon but something rings, "Not quite right" here...

    Late arriving facts/evidence (usually not allowed in court) unnecessarily plague your hapless forum helpers.

  • 0 in reply to Bharath Asokan
    TI__Guru**** 244400 points
    Hello Bharath

    Is the issue resolved or is it still open?

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Guru 47900 points
    Appears that (both) poster & (past) key member of U.S. congress - dislike "messy!"
  • 0 in reply to cb1
    TI__Guru**** 244400 points
    Hello cb1,

    I would rather have suggested looking at the Flash example on TM4C129 to see if the sequence can be double checked.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Prodigy 130 points

    Hello Amit,

                      We will find out a way and thanks for being SO helpful in the forum.

  • 0 in reply to Bharath Asokan
    TI__Guru**** 244400 points
    Hello Bharath,

    I checked the code on stackoverflow and it seems that the CS is never deasserted during each command. It remains Low till in_config and I think this is not the way Flash memory works.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Prodigy 130 points
    Hello Amit,
    It is mentioned in the flash datasheet to deasset the CS line after every read/write, but i saw in one of the tutorial where EMIF is used that the CS is kept low for three bus write operations which makes the flash to goto the command interface mode.I tried both the ways, but both didn't yield result. One more doubt is that is it necessary to consider the timings which are mentioned and they are in range of 'ns', i didn't consider the timings, is that a problem?

    Regards,
    Bharath.A
  • 0 in reply to Bharath Asokan
    TI__Guru**** 244400 points
    Hello Bharath,

    Yes, timings are important. Do make sure that MIN timings are honored by the code. I would also connect a LA and check the Control, Address and Data bus to see if the timings are indeed as expected by the flash memory.

    Regards
    Amit
  • 0 in reply to Amit Ashara
    Prodigy 130 points

    Thanks a lot for the continuous support Amit. will check my timings and proceed further and say the result. :)