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Clear the TGINTFLG Flag

Other Parts Discussed in Thread: TMS570LS20216

Hi,

We are using TMS570LS20216 safety processor, communicating with FPGA on SPI bus (4- wired). TMS570 is configured as the Master and SPI transfer is done using DMA.

These function are also used in our source code:

1] spiSetData

2] spiTransfer

3] while (!(spiIsTransferComplete(spiREG3,TG0))));

4] spiREG3->TGINTFLG = 0x00080000;

5] spiGetData

6] spiREG3->TGINTFLG = 0x00080000;

Before calling the “spiTransfer” function “TGINTFLG” shows 0x0 and after that it is set, but the value is not cleared anymore. Actually this statement “spiREG3->TGINTFLG = 0x00080000 or 0x00000000” does not clear the flag.

Adding a delay before “spiGetData” solves the problem and data transfer is done successfully but the baud rate is low and I should remove this delay.

I need a help to find a way for clearing the “TGINTFLG” flag, so the while statement really waits for the completion of Transfer Group 0.

Thanks in advance 

Fatemeh

  • Hello Fatemeh,
    Which transfer group are you using? In your while statement you are waiting for TG0 to complete. It looks like the flag you are trying to clear is for TG3.
  • Charles Tsai,

    Many thanks for your precise reply. It was exactly what I need.

    Changing the value assigned to spiREG3->TGINTFLG from 0x00080000U to 0x00010000U clears the flag. But one thing is still unclear to me, and that's why this value (0x00010000U) clears it.
    After data transfer is complete, this flag is set to 65536 32-Bit UnSigned int or 0x00010000U and assigning 0x00010000U clears it, These are the same !!!

    Best Regards,
    Fatemeh
  • Hi Fatemeh,

      The transfer group you setup is for Group 0. When the group 0 transfer is complete it will set the transfer-complete interrupt in the TGINTFLAG register. The bit for group 0 to be set is bit 16.  In order to clear the flag you must write a '1' to the flag. You can not write '0' to clear flag. This is a convenience so you do not need to perform a read-modify-write operation. For example, you could have multiple transfer groups all complete with their transfer and therefore multiple bits in the TGINTFLAG will be set. In order to clear just one flag you just need to write a '1' to that corresponding bit without affecting other pending flags.  

  • Charles,

    Thank you again for patiently answering my question. I completely understand what you mean.
    It is reasonable to set one bit for clearing the flag, when there is a possibility of using multiple transfer groups.

    I would be appreciated if you answer my last question, would you mind please telling me is there any reference documents or guides that I can refer to? I couldn’t find any information about this anywhere.

    Regards,
    Fatemeh
  • Hi Fatemeh,

      The transfer complete interrupt flags occupy the upper 16 bits of the TGINTFLAG register. Please see below. So bit 16 of TGINTFLAG corresponds to transfer complete interrupt for TG0 and bit 17 will correspond to TG1 and so on so forth. if you look at the description corresponds to a value of  '1' written to to the flag, it says 'Write: The corresponding bit is cleared'. If you look at the value for 0 written to the bit it says 'Write: A write of 0 to this bit has no effect'. I'm not sure if this is what you are looking for. If this is still not clear to you, please let me know so I will clarify again or find the pointer in the reference manual for you. The figure number below is for the LC4357 TRM. But, you can find the same description for your specific device by searching the figure title. 

  • Hi Charles,

    I am so appreciate of your help; your explanation is totally clear and helpful.
    There is no ambiguity for me anymore.

    With Regards,

    Fatemeh
  • Hi Fatemeh,

      I'm glad it is clear to you now.