Request for help in super capacitor design circuit

One assumes the "Linear Tech" forum or "Power Supply" forum (here) were unvisited.

Seems as if the input impedance of that TPS63002x notably drops when its output turns on or that your charger is insufficiently rated.

Believe that your reported, "disconnect of the downstream load" was on the right track.   Have you considered letting the charging "complete" (i.e. V_super_cap = 4V5) and only (then) electrically connecting the super cap to your TPS?    (such can be achieved via a relay or FET during "normal" operation - via a jumper wire or simple switch during experimentation.)    

Does your LT part state that you can "drive a load" while in the charging process?   (that seems to "flow against" normal super cap usage - does it not?  i.e. if you have "power" to run the charger - what's the point of super cap?)

The "moment of truth" reveals when that (cap to TPS) connection is made (after) the super cap is fully charged!    Should V_super_cap drop dramatically - and quickly -  that cap may not be sized correctly (or not so "super") and/or the "load" impressed by your TPS proves too great.

Adding to cb1's sizing note (supercaps do not store very much energy).

Am I to understand the output of the regulator driven by the supercap is in parallel to the main regulator? If so that is a problem and you are fortunate you found it this early. The output of various regulators have an error and the highest voltage regulator will take the majority of the load. With a buck/boost switcher that means if the regulator from the supercap has a slightly higher voltage it will preferentially drain the supercap before switching to you main supply. If the charge is in current limit (and it likely is) when you hit 1V8 it's not surprising you cannot charge.

The solution is normally to feed the regulator and the charging circuit off of the same supply. A pair of steering diodes picks the highest voltage to feed the regulator. Only when the incoming supply drops below the voltage on the supercap does the supercap feed the regulator. There are more active sophisticated solutions but this basic method is what you usually see in application notes showing backup batteries and supercaps. I'm sure there are some such notes from this vendor.

Robert

Good Robert - thanks for this addition.

I found the, "Charging while using (and connecting) the super cap" bit untidy.

The absence of key/critical details over-challenges I fear...

Critical details are indeed absent, a circuit sketch would help to suggest places to look.

Robert

Hello Robert

Or the schematic of the Super Cap+Charger which can be co-related to the LTC "Typical Application" circuit

Regards
Amit

And - perhaps one day poster to the LTC forum will note, "I have a problem with myTM4C..."

Fair is fair - after all... Caveat Venditor. (seller beware)

Thank you for the response.

Sorry had asked couple of questions related to TM4C forum and did not observe if it was going into the same forum while posting. I started  in the TI E2E Community only thinking its a common forum differentiated based #tags.

I have attached the schematic in the below document.

5140.Doc1.docx

I have tried the following steps while debugging.

- i can disable the buck-boost till super cap charges to 4V5 using power good signal from super cap charger which allows buck-boost to be switched on only when voltage is 6% within final value but power good goes low when super cap discharges below 7.5% of its value which is not of much help to me.

- Have tried fully charging the super cap by disabling the buck-boost. charges fine.

- Disconnect the downstream loads from buck-boost i.e. LDO and FETs. Did not help.

- Read from TPS datasheet that it switches on when VINA voltage is 1.8V. Hence  Connected a resistor across C157 and made sure TPS does not switch on till super cap voltage reaches 3.2V. worked fine but problem again while discharging.

P3P3V_CP and P5V are the raw voltage generated using switchers. I also observed that FET suggested in LTC3225 application is not correct for this requirement as it has a VDS drop of 0.6V to 1.1V which in case of 3.3V is a problem.

Several here were concerned w/your selection of the "super cap." Are you convinced that the value you've chosen is correct based upon your applied load? (the more detail you can provide here - the better.)

Yes. My requirement is to support certain restricted functions only for a duration of 1 minute after power fail. I have experimented with two 9F caps in series and could achieve 30 seconds currently if they are charged to 4.5V. Yet to experiment more.

1 - this seems entirely too complex, why all the extras?
2 - I don't actually see a supercap anywhere, the largest capacitor I see in the charge circuit is 10uF
3 - Your switcher U24 is fed from COUT at all times, why? It does not seem like a good idea.
4- Echoing cb1, what are your power and energy requirements. This really looks like the start of a solution for a much larger energy storage device, not a supercap
5 - Please don't use word. Images or PDF. Word is too dangerous.

Robert

Drop will depend on current and RDSon. What are those? That will help narrow things down.

Robert

OK, even from that limited info I would venture that supercaps will be inadequate. I think you need a battery.

Robert

@Robert,

Just in case this was missed - poster wrote, "I have experimented with two 9F caps in series and could achieve 30 seconds currently if they are charged to 4.5V."

If that "experiment" included a load which well matched his final design he (may) have a shot for that time-span.

As you say though - a proper battery for back-up would seem a far, "surer thing."

I did miss the in series portion, also didn't work out the power requirements. So 4.5F Total, you'd probably want to at least triple that for the 1 minute plus aging and margin. More like 4 to 5x I think. Say 16F@5V or 175J (discharge to 1V8) or 17mah on a 3V battery. The trouble is that's on the order of a 1/2 A draw if I've done my quick sums correctly, so a pretty significant battery as well.

Also temperature range not mentioned.

Still think the circuit appears overly complex. Now I'm wondering why so much power in shutdown?

Robert

I've three items to add:

• You report 30 seconds of viable super-cap performance during your "test/verify."   The load you applied to that super-cap array must very closely "mimic" the real load they'll see under normal - and under worst case conditions - as well.
• Might it be that your "downstream" switcher IC generates a current surge when it crosses the 1V8 point you report?   Sometimes you can control the start-up characteristics of such circuits (look for "slow start" or similar.)
• Poster's Robert & this reporter remain curious as to your calculation and/or measure of power required during system shutdown?

You really should review the MCU manual's description of "individual peripheral" disable - which substantially removes peripherals from the power equation...