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Flash error causing nERROR pin to be driven low

Abhijeet Mutha1
Prodigy 120 points
Other Parts Discussed in Thread: HALCOGEN

Hi Sunil,

I am facing the same problem in TMS570LS0332x .

In my case 'ERR_ONE_FLG' bit of 'FEDACSTATUS' is set but 'FCOR_ERR_ADD' contain 0x00000000.

I thought of setting some threshold value ( Number single-bit errors that are allowed before an interrupt is generated to the CPU) but it is mentioned in the reference sheet that 'FCOR_ERR_CNT' register is not affected by the EOFEN or EZEFEN error control bits in the FEDACCTRL1 register.

My system gets reset as the ESM pin drives the nERROR pin LOW as this error is occurred.

Can you please tell the reason for this error to occur and what should i do to prevent it.

Thanks
  • 0
    TI__Mastermind 49120 points
    Abhijeet,

    I have split this post from the earlier thread as that one was closed already. This allows us to keep better track of open questions.

    How can you say that you are actually seeing the nERROR pin driven on a single-bit flash ECC error? This is a normal response by the CPU on a double-bit flash ECC error once this response is enabled inside the CPU (enabled during start-up and configured in HALCoGen).

    Which status flags are set in the FEDACSTATUS register?