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Internal EEPROM wear leveling



Hi,

We are developing a custom board based on  TM4C129NCZAD microcontroller. We are using TI-RTOS 2.14.  The application demands that small amount of data(192 bytes) needs to be stored on loss of power and the original state restored back on  resumption of power.  We are provided with a backup of only a minute. We are thinking of using Internal EEPROM as it will consume very little power( Tested it takes about 30 Milliseconds for EEPROM write to be completed in our application. 

TThe Internal EEPROM section in the TM4C129NCZAD  data sheet  says that it has builtin wear leveling mechanism and 500K write cycles.  Can we write to the same location and the wear leveling is internally taken care off.  if not do we need to write to alternate addresses to prolong the life of Internal EEPROM.

TIA

Thanks

Narendra