As per example design, there are two NOR flash. One NOR flash has connection of RY/BY with EMIF_WAIT, and other has with GPIO. It is also mentioned that, with page mode of NOR flash, extended wait mode will be disabled. Hence there is no use of attaching RY/BY with EMIF_WAIT pin. Suppose page mode is disabled with NOR flash, then to read RY/BY, EMIF_WAIT pin will not facilitate as GPIO. What is purpose to interface RY/BY with EMIF_WAIT pin?
Our design contain MCU TMS570LS3137. We interfaced NOR flash (M29W128GL70ZA6E) with EMIF bus of MCU. There are other asynchronous peripherals with EMIF.
One of asynchronous peripheral, attached with EMIF, uses EMIF_WAIT pin. Hence, for interfacing NOR flash with EMIF, RY/BY pin is connected with GPIO (as per shown in example design in TMS570). This NOR flash configuration will work, if we load application program from this external NOR flash.
Reference design has shown EMIF register setting for NOR flash, but haven't mentioned any detail for RY/BY pin of NOR flash at different PINs of MCU. If I get clarification regarding what is difference in attaching RY/BY pin of NOR flash with either GPIO or EMIF_WAIT pin, then based on our application we can finalize NOR flash connections.
