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TMS570LC4357: Self test issue

TIDR
Genius 9355 points

My customer is finding that on executing interconnect self-test on their system,  5 widgets  2 showed an ESM Group3 error "CPU Interconnect Subsystem - Diagnostic Error".  They however continued booting though without a CPU exception getting triggered.

The TRM indicates that ESM group 3 errors are reserved for high severity errors that cause an abort however this didn't result in an abort in thier system.

There is an errata regarding the ICST for Rev A silicon but it doesn't seem to indicate any impact on abort condition.

Any ideas why this error is happening and why it doesn't generate an abort?

Rgds

-Dipa-

  • 0
    TI__Guru**** 191486 points

    Hi Dipa,

      ESM errors will only generate interrupts to the CPU, never a data abort (trapped at vector 0x10). Where do you see in TRM that says ESM errors will generate abort? We will need to make correction if it is stated incorrectly.

      ESM errors mapped to group 1 can be routed to either high (NMI) or low level interrupt.

      ESM errors mapped to group 2 are always to routed to high (NMI) interrupt.

      ESM errors mapped to group 3 will not generate interrupts. This are types of errors where CPU may not reliably be able to deal with and instead an error pin is asserted.

      Please go to SDC status registers starting at 0xFA000000 to see what causes the interconnect selftest to fail. You said 2 out of 5 failed. What is the HCLK frequency when the selftest is performed? The interconnect operates on HCLK.