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How about the EMIF drive capability of RM48L952?

Other Parts Discussed in Thread: RM48L952

We will connect 4 devices on the EMIF of  RM48L952,  CS0 is used for SDRAM, CS2 is used for Dual-port RAM, CS3 is used for SRAM(with ECC), CS4 is used for SRAM(with battery),  I want to know how about the EMIF drive capability, Should I add a bus driver between RM48L952 and the device, thanks!

Best Regards,

  • www.ti.com/.../toolssoftware

    There are IBIS models on this page (under the MODELS) heading.

    You can use IBIS models to simulate the drive of the signal and for the purposes of signal integrity.

    Can't answer your question as is. You really need to consider the speed of the SDRAM and DPRAM as well as the physical layout. Likely answer is *no* - you probably have more of a need for termination than buffering in this case. Especially because the synchronous EMIF max frequency on the RM48 is relatively low.