DMA Software Reset Register

Dave Saggs

Intellectual 720 points

I am resetting the DMA on TMS570LS317, by writing a 1 to the DMA RES bit in the DMA global control register.

When I read the value of the DMA RES bit, it is set to 0.

The technical reference manual (SPNU499B) does not say that this bit should always be 0 when it is read.

Is this how it should work, or is there something I am missing?

over 9 years ago

0 Anthony F. Seely over 9 years ago

TI__Guru 68920 points

Dave,

The bit is type ' R/WP-0" which means you need to be running in a privileged CPU mode (any mode other than USER) in order to write this bit. Is that the case?

0 Dave Saggs over 9 years ago in reply to Anthony F. Seely

Intellectual 720 points

Anthony,
I am running in System Mode (the CPRS Mode has all 5 bits set).
Best regards,
Dave

0 Anthony F. Seely over 9 years ago in reply to Dave Saggs

TI__Guru 68920 points

Hi Dave,

Ok I'll check it out on my hardware and see if it does the same.

0 Anthony F. Seely over 9 years ago in reply to Anthony F. Seely

TI__Guru 68920 points

I could reproduce the same result.

It is self resetting - although it's described in a less than direct fashion:

The DMA RES bit is in a control register, GCTRL.
Writing a 1 to the bit does the following: The DMA state machine and all control registers are in software reset.
The reset state of DMA RES is '0'.

It's actually not as trivial as that because when you write the bit as '1' this just requests that the DMA resets.
But the DMA ports need to respond with an 'ok' to reset which means they finished whatever transaction they were doing.
Then the reset takes place. It's just that this happens so quickly it's not observable.

0 Dave Saggs over 9 years ago in reply to Anthony F. Seely

Intellectual 720 points

Hi Anthony,

Many thanks for your answer.

Best regards,
Dave

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DMA Software Reset Register