Reset Signal Sanity Check

Robert Adsett

Somehow we ended up routing the Reset input to VDDA and pulled done (via SVC) to GNDA. Probably were mixing up power domain usage with the crystal power domain.

I any case we want to be sure that this is, in fact, wrong and that we didn't pick up on a reference from elsewhere before we go ahead and correct it.

Robert

over 9 years ago

0 Amit Ashara over 9 years ago

TI__Guru**** 244400 points

Hello Robert,

Which device are you using and schematic please?

Regards
Amit

0 Robert Adsett over 9 years ago in reply to Amit Ashara

Guru 27665 points

tm4c1230e6

RST goes to the micro's reset I/O line.

Robert

Well the image showed up when I first posted. Hopefully correct now

0 Amit Ashara over 9 years ago in reply to Robert Adsett

TI__Guru**** 244400 points

Hello Robert,

With the pull up on RST line and then connected to VDDA, would mean a current source during power up and during PLL operations or ADC operations may cause a voltage drop.

Regards
Amit

0 Robert Adsett over 9 years ago in reply to Amit Ashara

Guru 27665 points

That would not, in itself, be a problem. The reference should compensate for that like it does other supply voltage variations.

The question is, are my assumptions about the original circuit being in the wrong power domain correct?

We are re-doing the board for other reasons in any case so correcting even minor errors makes sense.

Robert

0 Amit Ashara over 9 years ago in reply to Robert Adsett

TI__Guru**** 244400 points

Hello Robert,

OK. The image showed up now.

As long as both 3.3V and 3.3VA are both up and the current draw when the reset is pressed does not cause 3.3VA output to droop, it should not be a problem.

Regards
Amit

0 Robert Adsett over 9 years ago in reply to Amit Ashara

Guru 27665 points

And the power domain? Is the reset in the analog or digital domain? The data sheet circuits suggest the digital.

Robert

0 Amit Ashara over 9 years ago in reply to Robert Adsett

TI__Guru**** 244400 points

Hello Robert,

Yes, it is in the Core Voltage Domain, though the IO works on 3.3V (not 3.3VA)

Regards
Anut

0 Robert Adsett over 9 years ago in reply to Amit Ashara

Guru 27665 points

Thanks Amit, that almost answers the question. I need just a little bit more information. Is the Core Voltage Domain in the 3.3V domain or the 3.3VA domain (without knowledge of the internals I can argue to myself either way).

Robert

0 Amit Ashara over 9 years ago in reply to Robert Adsett

TI__Guru**** 244400 points

Hello Robert

The Core voltage is derived from the LDO (1.2V) which runs on 3.3V

Regards
Amit

0 Robert Adsett over 9 years ago in reply to Amit Ashara

Guru 27665 points

Thanks Amit,

Much appreciated.
Robert

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Reset Signal Sanity Check