Ambiguous NOTE regarding VCLK, VCLK2 relationship requirement

Anthony F. Seely

Guru 68920 points

Note in TRM (SPNU489) page 133, 5.1.42 Clock Control Register (CLKCNTL) states:

Note: VCLK and VCLK2 clock ratio restrictions.

VCLK2 must always be greater than or equal to VCLK. In addition, the VCLK and

VCLK2 clock ratios must not be changed simultaneously. The application must

configure the VCLK2 ratio, read back the contents of the CLKCNTL register, and then

configure the VCLK ratio.

However, this is ambiguous. What attribute of VCLK2 must be greater than VCLK?

Is it the VCLK2 period in seconds? Is it the VCLK2 frequency in HZ? or is it the divider ratio

in the CLKCNTL register section where this note is found?

0 Haixiao Weng over 15 years ago

Anthony,

The frequency relationship between VCLK2, HCLK, and VCLK_sys is as follows:

HCLK ≥ VCLK2 ≥ VCLK_sys

I will add "The frequency of" in front of the note in next TRM release.

Regards,

Haixiao

0 Sunil Oak over 15 years ago in reply to Haixiao Weng

Frequency of VCLK2 must also be an integer multiple of the frequency of VCLK.

That is, f(VCLK2) = f(HCLK)/2 and f(VCLK) = f(HCLK)/3 is not allowed.

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