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Using all 22 ADC inputs on 100 pin Tm4c123gh6pz

Jake Ernst
Prodigy 180 points
Other Parts Discussed in Thread: TM4C123GH6PM, TM4C123GH6PZ

Hello. I am experienced in development on the Tm4c123gh6pm 64 pin chip. I would now like to move my software to the Tm4c123gh6pz and make use of the additional 12 ADC inputs. Using sample sequencer 0 on each ADC, I should have no problem processing 16 inputs. I am now trying to find the best way to sample the final 6 inputs.

My first thought is to add 3 inputs to SS1 for each ADC, and set the priority to a lower value than SS0. I have not attempted to use multiple sequencers feeding a single ADC, so does anyone have any suggestions, comments, or ideas of a better or more recommended way to sample all 22 inputs?

As a further note, I am currently using a processor trigger to kick off each sequence, then processing the data when the sequence complete interrupt is generated.

Thank you for your time and consideration.

  • 0
    TI__Guru 59540 points
    Hello Jake,

    In general SS1 operation will be the same as SS0 so I see no issues with your plan of implementation. Note, however, that the maximum channels and FIFO size is limited for each SSn where SS0 = 8 and SS1 = 4. This means that you will need to make updates to the SS configurations on the fly to cover all of your ADC channels. You may want to make use of more of the SS configurations and group the conversion channels together by frequency of use. i.e., if you only need to sample channesl 4, 5, 9, and 20 once every minute these could go into SS1 and say you need to sample channels 1, 2, 3, 6, 7, 8, 10, 11, and 12 every ms; put these in SS0. In turn, if there are items to sample "once in a blue moon" put these in SS2 which could be configured at the time of need with sampled channels that are rarely needed to be updated. These examples don't cover the full spectrum of possibilities, obviously, but it is intended to represent the idea of grouping by priority, need, or frequency of sampling to improve efficiency.