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QSSI master read ADC data speed

Other Parts Discussed in Thread: TM4C1292NCPDT

Hello community, 

I have one question, just to make things right, some clarification. 

OK, I use TM4C1292NCPDT, using QSSI I will read some data from ADC-s. In ADC sample rate is up to 1MSps, Sample is 16 bits, that means I need at least 16MHz on QSSI clock in controller QSSI. Since I will be running controller at 120 MHz I can set QSSI to 16 000 000 if master right? Since if I got it right for slave it needs to be at least 12 times slower than controller clock. It is not the problem to set controller as SSI master even if my controller all that will do is read this data and using uDMA shift this data to ethernet MAC?

  • So if I read your post correct, there are 2 questions:

    Djedjica said:
    Since I will be running controller at 120 MHz I can set QSSI to 16 000 000 if master right?

    ANSWER: yes

    Djedjica said:
    It is not the problem to set controller as SSI master even if my controller all that will do is read this data and using uDMA shift this data to ethernet MAC?

    ANSWER: no problems anticipated.

  • Thank You Mr. Devenport, yes that were my questions.
    Also, one more thing, since my prototype hasn't arrived jet so I can't test here. If my controller is master, and it will be reading data from some ADC-s that will be connected to QSSI lines, is it necessary for me to still send some dummy data from the master to ADC-s just to keep clk on?
    Something like:
    SSIDataPut (SSI1_BASE, 0x00);

    And since I am sending input data using uDMA directly to the Ethernet peripheral if I send some dummy data in QSSI interrupt will it slow down my readings??
  • Hello Djedjica,

    You will need to evaluate the interface needs of the external ADC and code your application appropriately. I don't know anything about the external ADC you are using so this is up to you. I would thing the external ADC would have its own clock source and not rely on the MCU's SPI messages to clock itself. Then again, as I stated, I know nothing about the ADC you are using.

    Djedjica said:
    And since I am sending input data using uDMA directly to the Ethernet peripheral if I send some dummy data in QSSI interrupt will it slow down my readings??

    Not sure what you are asking here? So if the question is if some of the SPI messages to the external ADC are dummy messages not result retrieval messages, then it would slow the ADC results readings only if the results were being obtained faster than you can supply SPI messages. Again, you need to review the ADC specs and determine how to architect your system to meet your needs.