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UART Interrupt latencies

I am working on a code to test some C++ classes. The code under test itself is meant to be used in an interrupt driven system. However the test code uses polling to allow one to test basic functionality before using interrupts.

The Tivaware code bellow does what part of the test code does:

// ... set the UART, interrupt etc. Put UART in loopback.
UARTCharPutNonBlocking(BASE_UART, byte);
while (!UARTCharsAvail(BASE_UART)) {}
uint32_t int_status = UARTIntStatus(BASE_UART, false);
assert (int_status != 0x20);

As you can see the input FIFO is checked to verify the character has been fully transmitted. But it takes a while before the TXMIS bit is set. How do I know this time? I have played with SysCtlDelay() but I would not like to just guess.

In a similar line, how long it takes for the MIS to be cleared after a

UARTIntClear(BASE_UART, int_status);

is executed? The peripheral library user guide states "Because there is a write buffer in the Cortex-M processor, it may take several clock cycles
before the interrupt source is actually cleared." How many clock cycles?

Thanks in advance