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Program dump issue due to PLL enable in TM4C123GH6PM

Other Parts Discussed in Thread: TM4C123GH6PM

Hello guys,

                I am using  TM4C123GH6PM . while dump a application into  controller normally it happens .but once i dump application with PLL active  after that ..

 most of the times it fails with the below message.... 

CORTEX_M4_0: Can' Run Target CPU: (Error -1268 @ 0x1090001) Device is locked up in Hard Fault or in NMI. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.14.5) 

CORTEX_M4_0: Flash Programmer: Error while writing to Flash memory
CORTEX_M4_0: File Loader: Memory write failed: Unknown error
CORTEX_M4_0: GEL: File:

am using  ..XDS100V2 usb debug probe....

       
int main(void) {
       
        ROM_FPUEnable();                      

	ROM_FPULazyStackingEnable();

	//
	// Set the clocking to run directly from the crystal.
	//

	ROM_SysCtlClockSet(SYSCTL_SYSDIV_4| SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ |
					SYSCTL_OSC_MAIN);


        ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
	ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
	//
	// Configure GPIO Pins for UART mode.
	//
	ROM_GPIOPinConfigure(GPIO_PA0_U0RX);
	ROM_GPIOPinConfigure(GPIO_PA1_U0TX);

	ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);

	ROM_UARTConfigSetExpClk(UART0_BASE, ROM_SysCtlClockGet(), 9600,
			(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));

  
       while (1) {

		 ROM_UARTCharPut(UART0_BASE, 'A');
	}

}






	

please let me know how to resolve this issue....

  

  • Hello Ramasubbu,

    What board are you using - custom or TI board? If using TI board, please let us know the board being used.

    Did you try to unlock the device using LM FLASH programmer? After performing the unlock sequence, do you still get the same error message?

    Are you able to program the MCU with application that has the PLL disabled?

    Sai
  • Hello sai,

                  Yes i can able to program without PLL . we have our own custom board...

                  How to unlock the device using programmer.?

     

    Regards,

    Ramasubbu

  • As a "swag" (guess) - if your report of program failure when the PLL is enabled is valid - I'd suggest:

    • increase the PLL divide factor - while keeping the PLL enabled - which will lower the MCU's System Clock.  (change "SYSCTL_SYSDIV_4" to "SYSCTL_SYSDIV_12")  This maintains System Clock very close to the 16MHz (non-PLL) frequency - but exposes the PLL, instead.  (i.e. "tests the PLL by running the MCU at near identical System Clock frequency")
    • Should the above work - the PLL as (likely) error source is (unlikely.)   This shifts the "blame" to board construction and/or proper handling of (all) power pins - especially "LDO" and similar.  
    • Even though you may not plan to use the ADC - the VDD_Analog must be connected and bypassed.
    • Check your xtal and xtal bypass caps - must be close to the MCU and away from noise sources

    Note that (many) here - using that JTAG probe - land here in difficulty.   Might your budget include funds for a more capable probe.  (J-Link surely proves superior)