This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Unable to load MAC address in Hercules TMS570LS3137

Other Parts Discussed in Thread: TMS570LS3137

Processor: TMS570LS3137

Hi all,

I have initialized the EMAC with its MAC address. I am able to transmit a frame to a specific MAC (my laptop), but I am not able to receive ethernet frames directed for my MAC. I am able to receive only frames having broadcast MAC, i.e., 0xFFFFFFFFFFFF.

The frame is received only when I turn ON the promiscuous mode. So my guess is I am not able to set MAC address properly. However, I have checked the MACSRCADDR and MACADDR registers of EMAC and they are getting set properly (there is no issue of endianness). 

The initialization process of EMAC includes,

  • initializing PHY/MDIO,
  • establishing the link,
  • initializing EMAC core,
  • Setting MACSRCADDR and MACADDR register,
  • Set RxUNICASTSET register,
  • Enabling Rx, Tx and MII mode. 

Can anyone please help me out with this? Is the process of initialization wrong or maybe I have not set any of the register properly?

Thanks in advance,

Ankit

  • One more observation to mention. When I set RxUNICASTSET register (writes to 0xFF), it also sets RxUNICASTCLEAR register (writes to 0xFF). This is also something abnormal that I observed.
    Any views on this will be appreciated.

    Thanks in advance,
    Ankit

  • Hi Ankit,
    Let me first answer the simpler question about the RxUNICASTSET and RxUNICASTCLEAR registers. This is only one physical register but it has two different addresses. To enable unicast for a channel you will write a '1' to the RxUNICASTSET register. Writing a '0' to a channel that is already set will have no effect. To disable a unicast channel you will write a '1' to the RxUNICASTCLEAR register. Again, writing a '0' to a bit that is already set via the RxUNICASTCLEAR can not enable the channel.

    Since there is only one physical register, both views via the two different addresses will show the same content. This is the reason that when you set something in RxUNICASTSET it will reflect the same content in the RxUNICASTCLEAR.
  • Thank you for your reply Charles.
    Also, I would like to mention that initialization process was not done properly, so now the MAC problem is also solved.

    However, I have been trying to set the Rx Interrupt for the EMAC, but it is not getting set.
    The setting of interrupt is given below:
    1) EMAC RxIntMaskSet is set for channel 0
    2) Enable the global interrupt C0RxEn.
    3) VIM is set for C0RxPulse

    I am not able to get any interrupt, where as when I poll Ethernet Owner bit, I am getting the frames. Any views on this.

    Thanks in advance,
    Ankit
  • The issue is solved. Thanks Charles for your kind co-operation.
  • Hi Ankit,
    Glad your problem is resolved.