How many different level of interrupt are there in the TM4C processor

Shan Cao

I read the code of Uart echo program in the tiva C, and found the code below, there are ROM_IntMasterEnable(), ROM_IntEnable(INT_UART0) ROM_UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT), I look into the manual, it said:

ROM_UARTIntEnable() This function enables the indicated UART interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

ROM_IntMasterEnable()

This function allows the processor to respond to interrupts. This function does not affect the set of interrupts enabled in the interrupt controller; it just gates the single interrupt from the controller to the processor.

why we need to init the interrupt sequentially, and how many different levels of interrupts are there.

//
    // Enable the peripherals used by this example.
    //
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

    //
    // Enable processor interrupts.
    //
    ROM_IntMasterEnable();

    //
    // Set GPIO A0 and A1 as UART pins.
    //
    GPIOPinConfigure(GPIO_PA0_U0RX);
    GPIOPinConfigure(GPIO_PA1_U0TX);
    ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);

    //
    // Configure the UART for 115,200, 8-N-1 operation.
    //
    ROM_UARTConfigSetExpClk(UART0_BASE, g_ui32SysClock, 115200,
                            (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
                             UART_CONFIG_PAR_NONE));

    //
    // Enable the UART interrupt.
    //
    ROM_IntEnable(INT_UART0);
    ROM_UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);

over 9 years ago

0 Robert Adsett72 over 9 years ago

Guru 10570 points

There are many levels of interrupt but you are referring to interrupt masking and enabling which is different.

Interrupts can be globally enabled or disabled in the microcontroller.

The interrupt processor serves multiple peripherals and can enable/ disable the interrupt for each independently. In addition it gives each interrupt a priority and can mask off low priority interrupts.

Finally each peripheral may be capable of enabling or disabling its interrupt. And some peripherals like the UART may have multiple interrupt sources that can be individually enabled/ disabled.

Robert

0 cb1_mobile over 9 years ago in reply to Robert Adsett72

Guru 117855 points

Along w/Robert's neat listing above - your acquisition of Joseph Yiu's book re: ARM MCU will build your understanding & provide detail & insight beyond that of any one ARM vendor.

Those multiple levels of interrupt - which you identified & Robert described - provide great power & flexibility which increase the ability of the ARM MCU to satisfy a wide range of demanding applications...

Again - Mr. Yiu's book is well regarded & will provide you a more cohesive learning path - surely to your benefit...

0 cb1 over 9 years ago in reply to cb1_mobile

Guru 47900 points

Joseph Yiu's book, "The definitive guide to the Cortex-M3" (and newer M4 version) will prove worthwhile based upon your interest & desire to (really) learn.

Further - ARM's web-site provides "treasure trove" of info.
These two tips combined w/your read of this vendor's API & MCU manual will advance your knowledge.

The LPad is low cost & a great means to experiment/test - thus make the MCU theory & your programming, "real."

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How many different level of interrupt are there in the TM4C processor