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RE: Undefined symbols when including SafeTI library

Other Parts Discussed in Thread: TMS570LC4357, HALCOGEN

Same error occurs for the SafetyLib example of TMS570LC4357...AG, did the code work with any other modifications? Can TI e2e support give a solution to this issue?
  • Sindhu,

    Splitting your post into it's own thread.

    I assume you found 'exampleSafetyLib.c'. Did you follow all of the instructions in the online help? If so it should build without issue.

    The functionality isn't perfect in this example, especially the handling of the nERROR pin and reset conditions. It is mainly meant to show how to combine HalCoGen and the SafeTI library into one project. This is an example that we need to continue to improve for functionality in especially in different cases exiting reset.

    What exactly are you seeing as a problem?

    -Anthony
  • Hello Anthony

    It is the same example from HALCoGen that you are mentioning. I've followed the instructions mentioned in the example

    "Add all the files in the folder "<SL installation path>\safety_library\source" in the project

    *   Include the following directories to #include search path

    *      - "${workspace_loc:/${ProjName}/include}"

    *      - "${workspace_loc:/${ProjName}/<folder where SL files are added>}"

    *      - "<SL installation path>\hal\include"

    *      - "<SL installation path>\safety_library\include"

    *

    *   @b Step @b 3:

    *

    *   Add the following macros (without quotes) as predefined symbols to the project (Project Properties->CCS Build->ARM Compiler->Advanced Options->Predefined Symbols):

    *      - "_TMS570LC43x_" (or "_RM57Lx_" based on the device)

    *      - "_VFP_SUPPORT_=1"

    *      - "EXTERNAL_SP_INIT"

    *

    *   @b Step @b 4:

    *

    *   Add the following in the SECTIONS block in the linker command file

    *

    *      LOG_DATA          : START( ulLOGStartAddr ), END( ulLOGEndAddr ) > RAM

    *

    *   .sl_stflash_SRAM  : RUN = RAM, LOAD = FLASH0|FLASH1, LOAD_START(ulHighHandlerLoadStart), LOAD_END(ulHighHandlerLoadEnd), LOAD_SIZE(ulHighHandlerSize), RUN_START( ulHighHandlerStartAddr ), RUN_END( ulHighHandlerEndAddr ) "

    To your question "What exactly are you seeing as a problem?"


    The test doesn't progress from the PBIST ROM test as it enters while(1); as SL_SelfTest_PBIST() returns FALSE due to nERROR active. The status registers show that the errors are 1)CCM-R5F Self Test 

             2)CPU Interconnect Subsystem - Global error

    Does errata DEVICE#48 and #49 has anything to do with this code?

  • No this is just an issue with the example being out of sync with the API function.
    It's a known issue. You would need to add some code to this example to clear the error pin if you want to get past this while(1) loop.
  • Hello Anthony,

    Is there a workaround for this known issue? What code has to be added and where to add the code?

    I also see that the Error pin doesn't reset after Errkey is written with 0x5.

  • Sindhu,

    The exampleSafetyLib.c code is only an example showing how to call the API's.  It's like the other example code - it's not necessarily robust.

    In this case there is an issue in just doing while(1) if that call returns an error because of the nERROR pin.

    The ERRKEY sometimes needs to be written 0xA then 0x5 or else the pin won't clear.    We aren't sure why exactly but seems like this has to do w. reset.

  • Thank you Anthony for getting back to this question. I'll try with writing 0xA first to ERRKEY and then 0x5
  • I have another query regarding the same code.  For VIM RAM, the PBIST test is done as follows in the HalCoGen example

    #if PBIST_VIM_ENABLE == 1
            {
             boolean retVal;
             SL_PBIST_FailInfo pbistStatus;

             /* Start PBIST on STC and PBIST ROM */
             retVal = SL_SelfTest_PBIST( PBIST_EXECUTE,
                    PBIST_RAMGROUP_01_PBIST_ROM |
                    PBIST_RAMGROUP_02_STC1_1_ROM_R5 |
                    PBIST_RAMGROUP_03_STC1_2_ROM_R5 |
                    PBIST_RAMGROUP_04_STC2_ROM_NHET,
                    PBISTALGO_TRIPLE_READ_FAST_READ |
                    PBISTALGO_TRIPLE_READ_SLOW_READ);
             if(retVal == false){while(1);}

                /* Wait for PBIST on ROM to complete */
             while(SL_SelfTest_Status_PBIST(&pbistStatus) == FALSE);
             SL_SelfTest_PBIST_StopExec();

             if(pbistStatus.stResult != ST_PASS)
             {
              /* PBIST fail */
              while(1);
             }

             /* Clear VIM pending interrupt request (Channel 85 - PBIST Done) */
             vimREG->INTREQ2 = 0x00200000;
            }
    #endif

    Why is the PBIST RAM selection parameter( the second parameter passed to SL_SelfTest_PBIST() ) for VIM RAM testing is PBIST and STC ROM group ?