PBIST

Sindhu,

They are not documented as being memory mapped.
They can however be selected to be tested by the PBIST controller.

Hello Anthony

I would like to get cleared a few doubts I have on Safety Library example Code provided in HalCoGen for TMS570LC4357.

1) After loading the program, I see the following status in the ESM register

     

Why does these errors are indicated in Status registers 1,4 and Shadow Status 2 registers ?

2) Why ESM Initialization is done after PBIST test?

3) If ESM Init(); is called before the Errata Workaround ( errata_PBIST_4() ) provided in Example code, the ErrPinStat register remains 0x00000000 and doesn't return to 0x00000001 as expected (because ErrKey=0x05 is written in esminit() ), whereas all other Status registers are reset ?

4) Please let me know if these error status is related to the device errata #48 an #49 of Silicon Revision B.

Thanks in advance.

> Why does these errors are indicated in Status registers 1,4 and Shadow Status 2 registers ?
I don't understand the question. If you want to know what these error bits mean though there is a table explaining them in the datasheet.

For the www.ti.com/.../TMS570LC4357 we do not have a specific startup application note yet and halcogen for this part is still beta.
You can look at www.ti.com/.../spna106 to see if this perhaps answers some of the questions.

I tried to mean that these errors did not occur on loading any other program in this controller. Only on loading this example, the errors occurred. Hence the question why these errors are indicated?
Also I've referred to datasheet what these errors are.