TMS570LC43xx asymmetic PWM settings

Hi Shuozhi,

  I think your observation is an expected behavior. If you refer to the TRM where it talks about what happens when several events happen at the same time. In your case, a compare match as well as a TPPRD match at the same time. In this case, the module follows a defined priority. For up count mode the counter equal to period will be higher priority than a CMPA match. See below table. With a 100% duty cycle the hardware will first try to reset the pin due to the  matching period with the higher priority  then immediately followed by setting the pin again for a compare match. Your workaround is what I would also do to avoid the glitch. 

Below is the excerpt from the TRM. 

It is possible for the ePWM action qualifier to receive more than one event at the same time. In this case events are assigned a priority by the hardware. The general rule is events occurring later in time have a higher priority and software forced events always have the highest priority.

Thank you, Charles!

I just noticed another glitch occurs when I change the duty cycle from 100% to a different value, which was caused by the asynchronized CMPA update (shadowed) and AQCTL_PRD (immediate), given that we want to keep the CMPA register shadow mode.

The configuration and steps are as follows (duty cycle 100% -> 50%, same ePWM configuration as my previous question),

1. set AQCTL_PRD = 1 (set output to low when TBCTR == TBPRD)

2. set CMPA = 1/2 * TBPRD (50% duty cycle)

AQCTL_PRD is effective immediately while CMPA need another complete cycle to be effective (or the CAU event occurs in the next cycle), which results in a glitch at TBCTR == TBPRD before the actual 50% duty cycle takes place.

I have tried changing the order of step 1 and step 2 above but it does not make any difference. Changing CMPA register from shadow mode to immediate mode solves the problem; however, I do want to keep CMPA shadow mode during during other duty cycle value settings, thus I need to add another extra logic in step 2:

2.1 if ( previous duty cycle == 100% )

      {

           set CMPCTL_SHDWAMODE = 1;  // disable shadow mode

           set CMPA = 1/2 * TBPRD;              // 50% duty cycle

           set CMPCTL_SHDWAMODE = 0;  // enable shadow mode

      }

Can you please confirm if above is the expected configuration for my situation?

Thank you very much!

Thank you!