Analog comparator polarity bits are ignored and PWM fault inputs polarity has no effect.

EK-TM4C1294NCPDTi3-XL:

All 3 comparator outputs strobe if the inputs are strobed but stay in the high level if the (Cx-) inputs are held at ground.

 Code shows dual configuration, internal or external selection for the (C0+) voltage reference depending on J10.

Polarity set has no effect on the analog comparator outputs. PWM control block driven by analog comparator outputs into PWM Fault inputs stay perpetually disconnected. Say we assert (PWM_Gen_Mode_Extended) change High to Low fault polarity for (Latched) Gen faults (PWM_Gen_Mode_Fault_Latched) versus typical (PWM_Gen_Mode_Fault_Minper) --- The polarity switch has no effect on the PWM control block output drives. Noting the extended OR'd PWM Fault INT25 vector is also not being triggered as we might expect it to since the PWM drives are disabled. 

Any ideas??

//*******************************************************
// Analog comparator for PWMGEN's fault configuration:

    /* Configure COMP0-2 internal reference output
     *  inverted (VN- < VN+ref VOUT = 1) */
    ROM_ComparatorConfigure(COMP_BASE, 0 , (COMP_TRIG_NONE |
    		       COMP_ASRCP_REF | COMP_OUTPUT_INVERT)); //COMP_OUTPUT_NORMAL
    ROM_ComparatorConfigure(COMP_BASE, 1 , (COMP_TRIG_NONE |
    		       COMP_ASRCP_REF | COMP_OUTPUT_INVERT)); //COMP_OUTPUT_NORMAL
    ROM_ComparatorConfigure(COMP_BASE, 2 , (COMP_TRIG_NONE |
    		       COMP_ASRCP_REF | COMP_OUTPUT_INVERT)); //COMP_OUTPUT_NORMAL

    /* Configure the ASRCP source selection port for J10 jumper detection.
     * L = Strap ON / H = Strap off */
    ROM_GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_3, GPIO_PIN_TYPE_STD_WPU);
    MAP_GPIODirModeSet(GPIO_PORTD_BASE, GPIO_PIN_3, GPIO_DIR_MODE_IN);

    /* J10 removed enables ANLGCOMP C0+ +Vin input pin
     * to use external resistor dividers as the voltage reference.*/
    if(ROM_GPIOPinRead(GPIO_PORTD_BASE, GPIO_PIN_3) == 0x00)
    {
        /* Alternate +Vref source pin PC6 for COMP0 C0+ */
        MAP_GPIOPinTypeComparator(GPIO_PORTC_AHB_BASE, GPIO_PIN_6);

        /* Configure each ANALGCOMP (+ve0) VIn+ for the C0+ external
         * reference input source */
        ROM_ComparatorConfigure(COMP_BASE, 0 , (COMP_ASRCP_PIN0));
        ROM_ComparatorConfigure(COMP_BASE, 1 , (COMP_ASRCP_PIN0));
        ROM_ComparatorConfigure(COMP_BASE, 2 , (COMP_ASRCP_PIN0));

	}
	else
	{
	    /* Set comparator reference voltage internal reference source
	     * Table22-4 0x30Bh = (1.567v min, 1.641v ideal, 1.715v max  VIRef)
	     * EN=1, RNG=1 7.498 amp trip Fault */
 	    ROM_ComparatorRefSet(COMP_BASE, COMP_REF_1_959375V );
         }

    // Enable pin PD0 for COMP0 C0O Digital GPIO Output
    ROM_GPIOPinConfigure(GPIO_PD0_C0O);
    GPIOPinTypeComparatorOutput(GPIO_PORTD_AHB_BASE, GPIO_PIN_0);

    // Enable pin PD1 for COMP1 C1O Digital GPIO Output
    ROM_GPIOPinConfigure(GPIO_PD1_C1O);
    GPIOPinTypeComparatorOutput(GPIO_PORTD_AHB_BASE, GPIO_PIN_1);

    // Enable pin PD2 for COMP2 C2O Digital GPIO Output
    ROM_GPIOPinConfigure(GPIO_PD2_C2O);
    GPIOPinTypeComparatorOutput(GPIO_PORTD_AHB_BASE, GPIO_PIN_2);

    /* Configure ANLGCOMPs (ve-)VIn- pins PC4, PC7 COMP C1-, C0-
     * for inputs into the analog comparator periperal.
     * INA282 current shunt monitor is hardwired signal into PC4, PC7 inputs  */
    ROM_GPIOPinTypeComparator(GPIO_PORTC_AHB_BASE, GPIO_PIN_4);
    ROM_GPIOPinTypeComparator(GPIO_PORTC_AHB_BASE, GPIO_PIN_7);

    /* Configure pin PP1 COMP C2- (ve-)VIn- as the current level input.
     * for inputs into the analog comparator periperal.
     * INA282 current shunt monitor is hardwired signal into PP1 input  */
    ROM_GPIOPinTypeComparator(GPIO_PORTP0_AHB_BASE, GPIO_PIN_1);

PWM fault polarity code:

    ROM_PWMGenFaultConfigure(PWM0_BASE, PWM_INT_GEN_1, 0, PWM_FAULT1_SENSE_LOW);//HIGH
    ROM_PWMGenFaultConfigure(PWM0_BASE, PWM_INT_GEN_2, 0, PWM_FAULT2_SENSE_LOW);//HIGH
    ROM_PWMGenFaultConfigure(PWM0_BASE, PWM_INT_GEN_3, 0, PWM_FAULT3_SENSE_LOW);//HIGH