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STC1 Selftest for TMS570LC4357

Sindhu Krishna
Expert 1350 points
Other Parts Discussed in Thread: TMS570LC4357, HALCOGEN

Greetings TI

I have a trouble with the Safety Library code for TMS570LC4357 available in HalCoGen. When I run Selftest for STC1 in Diagnostic mode, the code runs to

Also the STC register Status are

and the status of ESM registers are

As per the explanation in Technical Reference Manual, the test_fail bit has to set in STCGSTAT after the Selftest completion. But it dint happen as expected. The clock being set are GCLK - 300MHz, HCLK - 150MHz, VCLK2 - 75MHz. Please let me know what is the expected behavior after Selftest and why I get this error? 

Thanks in advance!

  • 0
    TI__Guru 68920 points

    Sindhu,

    we have seen this as well.   this is just because the example finished.  the main() function returned,  exit was called and then abort().

    i am not sure why abort() vs. something else and it doesn't matter too much as normally you don't exit main().  it may have to do with not

    returning a correct integer value signalling normal termination.

    in any case this abort() is not the same as the data abort or prefetch aborts of the processor.  it is a function from the runtime lib that gets called

    after main exits in some cases.

    the reason we believe you are getting here is that the CPU STC seems to clear out the breakpoint that is set when you do a 'go main()' in CCS, [or when this is automatically done for you when you launch a debug session if that option is set.]


    Try simply putting a  'while(1)' statement inside main().   I think you will find that in that case when you halt you will find the CPU there.

    So it's not really a problem per se but it's that the STC test disrupts the debugger's ability to set breakpoints -- which makes sense if it scans the CPU as a sea of gates and doesn't then also save/restore state.

  • 0 in reply to Anthony F. Seely
    Expert 1350 points

    Thank you Anthony. Writing while(1) into main() solved the exit(); issue.

    Now comparing with the TRM of TMS570LC4357 for STC Diagnostic Selftest, the Example code behavior has a mismatch.

    As per TRM,

    The Registers values of STC module deviates from the expected

    TRM says FSEGID bits must be 01, but here it is 00. What is causing this issue ?