I2C using interrupt for both master and slave

Hello Mayli,

The I2C standard states that only 8 data bits can be sent at a time. More information regarding I2C data formats can be found in the TM4C129 datasheet in section 21.3.1. There are interrupts that can be enabled upon completion of transmission of a byte so that another byte may be loaded and transmitted or the operation completed in the case of block transfers. this can be used in conjunction with the repeated START feature but will still be limited to address + 8 bytes and each message loaded to be transmitted.

The closest thing I have found to what you are asking relative to a burst mode operation would be CBUS mode of operation which requires another signal to determine data length and which is nor supported on TM4C.

In reality, what you are mentioning sounds a bit more like SPI (SSI) than I2C. Perhaps some level of autonomous operation might be achievable using the uDMA but I am not certain without further investigation. This interface would also require a few more interconnect signals as well.

Thanks Chuck,

I will try SSI using uDMA as you said.

Hello again Chuck,

I was looking for how to use uDMA with SSI as you said. However, I'm a beginner on DMA and I could not find an easy way to figure out how to implement it.

I have already read the datasheet and I also tryed to unsderstand the "udma_demo" example wich uses UART with udma.

Here are some initial doubts:

1. I checked that there are a lot of possible configurations for udma. Which one do I have to use in my case ? 

2. What are the steps of the uDMA with SSI communication ? Do I have to configure every step ?

Hello Mayli,

I would recommend that you first have the SSI working. Use uDMA only if you need it, as setting up uDMA is not trivial.

Thanks,
Sai

Hello Sai,

I already tested the SSI but as I said on the first post, my application needs that the communication happens on background because I cannot pause my main code.

Thanks

Hello Mayli,

When using interrupts, the main code will still continue to work. Based on how efficiently the Interrupt Service Routine is written, using interrupts should be sufficient for most applications.

Also SSI has two FIFOs - one for Transmit and one for Receive. Each FIFOs has 8, 16-bit locations. So the FIFO can hold upto 16 bytes. The interrupts can be triggered when the Receive FIFO is half full or more, that is, the main code won't be interrupted until atleast 8 bytes are received.

If the System Clock is running at 120MHz and the SSI is configured at it fastest speed of 2MHz, then the interrupt would be generated once in 480 clock cycles. The efficiency of the interrupt handler is important as it will take up some of these 480 cycles. Please note that this is rough calculation, aimed at highlighting the fact that even without using uDMA, the main application will get significant amount of time.

You can also add the Receive FIFO time-out interrupt (in conjunction with the Receive FIFO half full interrupt), which triggers an interrupt, if data is not received for a certain time.

If you still want to use the uDMA, then there should be multiple posts on this forum about the same topic.

Thanks,
Sai

Thank you very much, I will try that.

Mayli.