EK-TM4C123GXL, IAR, and J-Link

Keith Smith

Intellectual 330 points

Other Parts Discussed in Thread: EK-TM4C123GXL, TM4C123GH6PM, SEGGER

I have connected a J-Link debugger to my EK-TM4C123GXL using a Tag-Connect TC2050-IDC-NL with CLIP.

I start my IAR workbench under Windows 7. I initiated the download.

I have moved the Device/Debug switch to Device.

With just the JTAG connector I get the error 'Failed to get CPU status'.

Wed May 11, 2016 08:43:30: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.3\arm\config\debugger\TexasInstruments\TM4C123.dmac
Wed May 11, 2016 08:43:31: JLINK command: ProjectFile = C:\Users\smithkm\Perforce\ksmith_SHLLL0924_ProjectSwiftMainline_1073\Firmware\ProdCPPMain\settings\ProdCPPMain_Debug.jlink, return = 0
Wed May 11, 2016 08:43:31: Device "TM4C123GH6PM" selected.
Wed May 11, 2016 08:43:31: DLL version: V5.2i, compiled Nov 3 2015 17:24:17
Wed May 11, 2016 08:43:31: Firmware: J-Link compiled Jul 30 2008 11:24:37 ARM Rev.5
Wed May 11, 2016 08:43:31: JTAG speed is initially set to: 1000 kHz
Wed May 11, 2016 08:43:31: Hardware reset with strategy 0 was performed
Wed May 11, 2016 08:43:31: Initial reset was performed
Wed May 11, 2016 08:53:06: Fatal error: Session aborted!

When I plug a USB cable into the 'Device' connector, I get the message 'Target VCC failure'.

Wed May 11, 2016 08:53:50: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.3\arm\config\debugger\TexasInstruments\TM4C123.dmac
Wed May 11, 2016 08:53:51: JLINK command: ProjectFile = C:\Users\smithkm\Perforce\ksmith_SHLLL0924_ProjectSwiftMainline_1073\Firmware\ProdCPPMain\settings\ProdCPPMain_Debug.jlink, return = 0
Wed May 11, 2016 08:53:51: Device "TM4C123GH6PM" selected.
Wed May 11, 2016 08:53:51: DLL version: V5.2i, compiled Nov 3 2015 17:24:17
Wed May 11, 2016 08:53:51: Firmware: J-Link compiled Jul 30 2008 11:24:37 ARM Rev.5
Wed May 11, 2016 08:53:51: JTAG speed is initially set to: 1000 kHz
Wed May 11, 2016 08:53:51: Could not measure total IR len. TDO is constant high.
Wed May 11, 2016 08:53:51: Hardware reset with strategy 0 was performed
Wed May 11, 2016 08:53:51: Initial reset was performed
Wed May 11, 2016 08:53:51: Could not measure total IR len. TDO is constant high.
Wed May 11, 2016 08:53:51: Could not measure total IR len. TDO is constant high.
Wed May 11, 2016 08:53:51: TotalIRLen = ?, IRPrint = 0x..0000000000000000000000FF
Wed May 11, 2016 08:54:12: Fatal error: Target VCC failure. Please check target voltage. Session aborted!

What is the correct configuration to use a J-Link with the TM4C123GXL Launchpad board?

Keith Smith

over 9 years ago

0 Amit Ashara over 9 years ago

TI__Guru**** 244400 points

Hello Keith,

How are you connecting the J-Link to the EK-TM4C123GXL? Have you connected the EXTDBG pin to GND?

Regards
Amit

0 Keith Smith over 9 years ago in reply to Amit Ashara

Intellectual 330 points

Thank you Amit. I will make that connection.

0 Keith Smith over 9 years ago in reply to Keith Smith

Intellectual 330 points

I have made a connection from EXT DBG to GND. My J-Link is connected via the Tag-Connect 10 pin connector.

Now I'm not certain how to power the board and what position the DEVICE/DEBUG switch is set to. I'm still receiving Bad VCC errors.

0 cb1 over 9 years ago in reply to Keith Smith

Guru 47900 points

Beyond Amit's, "EK connection advice" you may wish to: (select "Project" then "Options")

and

You listed: "Firmware: J-Link compiled Jul 30 2008 11:24:37 ARM Rev.5"

We note that your "J-Link" firmware appears (beyond) prehistoric - often suggesting that your J-Link, "Sails the hi-seas." (i.e. is pirate version)

"EDU" model J-Links are available at tremendous discount - and one does NOT (even have to pretend) to be a student... (simply comply w/Segger's directive)

0 Amit Ashara over 9 years ago in reply to Keith Smith

TI__Guru**** 244400 points

Hello Keith

Are you reprogramming the Main MCU or the ICDI MCU?

Regards
Amit

0 Keith Smith over 9 years ago in reply to cb1

Intellectual 330 points

The J-Link unit is old. It is a third party Digi unit, from an old project. Have other J-Links to try, if you think this is a reason for the error.

0 Keith Smith over 9 years ago in reply to Amit Ashara

Intellectual 330 points

Reprogramming MCU. Am working with the boot loader code and cannot break effectively with the TI Stellaris debugger.

0 cb1 over 9 years ago in reply to Keith Smith

Guru 47900 points

May I suggest that you employ "KISS!"

Now we (first) learn of the devil (bootloader) and much complexity is added.

You'll do much better to confirm that your JTAG probe works by downloading a very simple, vendor supplied project - surely NOT a boot-loader!

0 Amit Ashara over 9 years ago in reply to Keith Smith

TI__Guru**** 244400 points

Hello Keith

The TI Stellaris Debugger is very effective for both USB and UART Boot Loaders. I am not sure by J-Link will not be performing the same action over the functional serial interfaces.

Regards
Amit

0 f. m. over 9 years ago in reply to Amit Ashara

Guru 11940 points

I am not sure by J-Link will not be performing the same action over the functional serial interfaces.

Not quite sure if I understand this "double negative" statement.

Anyway, I'm confident that the J-Link debug probe does NOT support any vendor-specific bootloader mode. That fails already, because of the (again highly vendor-specific) boot-mode selection pins, which are not routed over the JTAG connector. Considering the number of supported devices, Segger would have a hard time to implement every device-specific bootloader protocol. And having a J-Link in front of me, I cannot find such option anywhere in the toolchain or the Segger config tools.

0 cb1_mobile over 9 years ago in reply to f. m.

Guru 117855 points

Appears that poster f.m. - and earlier cb1 - have highlighted the "devil" bootloader as, "likely villain."

Along w/"double negative" (just reading the intricacies of bootloader proves complex enough) any claim of "Stellaris Debugger being "very effective"" is subject to much debate. Hundreds of users have crashed/burned using it - have they not? (somewhat effective may better comply w/"Truth in Advertising.")

KISS points clearly, convincingly towards the shift to a far simpler, known good, vendor supplied program. In this manner - at minimum - confidence in the debug probe can be gained/restored. (although "pirate" probes are always questionable in performance - and (likely illegal), surely unfair to the "real" manufacturer/originator!)

0 Amit Ashara over 9 years ago in reply to f. m.

TI__Guru**** 244400 points

Hello f.m.

Thanks for the correction. The statement should have read as "I am not sure if J-Link will perform the same action over the function serial interface"

Regards
Amit

0 Keith Smith over 9 years ago in reply to Amit Ashara

Intellectual 330 points

I will start another thread detailing my problems with TI Stellaris Debugger and boot loader.

Keith

0 Keith Smith over 9 years ago

Intellectual 330 points

One item that I have found is the EK-TM3C123GXL reference design, it does not connect VREF to pin 1 of the JTAG connector. My J-Link device requires a reference voltage on pin 1.

0 Amit Ashara over 9 years ago in reply to Keith Smith

TI__Guru**** 244400 points

Hello Keith

EK-TM3C123GXL is not a reference design. It is a Evaluation launchpad. Which Pin-1 are you referring to. Can you please mark it in the image of the board and attach the image to the forum?

Regards
Amit

0 Keith Smith over 9 years ago in reply to Amit Ashara

Intellectual 330 points

I'm referring to this document. http://www.ti.com/lit/ug/spmu296/spmu296.pdf

At the end of the document are 3 pages of schematics. On page 3 of 3, ICDI JTAG shows pin 1 as a N/C.

Keith Smith

0 Amit Ashara over 9 years ago in reply to Keith Smith

TI__Guru**** 244400 points

Hello Keith,

That ICDI is to program the ICDI MCU and not the main MCU

Regards
Amit

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EK-TM4C123GXL, IAR, and J-Link