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RM48L952ZWT: Serial Port (read current notification, not just write)

Other Parts Discussed in Thread: HALCOGEN

The HalCoGen RM48x Help lists the following 2 functions:

void sciEnableNotification(sciBASE_t * sci, uint32 flags);
void sciDisableNotification(sciBASE_t * sci, uint32 flags);

I traced the flags argument to the following:

// Interrupt Flag Definitions
//enum sciIntFlags
//{
// SCI_FE_INT = 0x04000000U, /* framing error */
// SCI_OE_INT = 0x02000000U, /* overrun error */
// SCI_PE_INT = 0x01000000U, /* parity error */
// SCI_RX_INT = 0x00000200U, /* receive buffer ready */
// SCI_TX_INT = 0x00000100U, /* transmit buffer ready */
// SCI_WAKE_INT = 0x00000002U, /* wakeup */
// SCI_BREAK_INT = 0x00000001U /* break detect */
//};

I want to be able to change the status of one of the bits, usually the TBR notification. How can I read in the current state of the flags register? I do not see any read notification flags register function.

  • HI Sarah,

      The sciEnableNotification() is trying to set one or many of the bits listed below in the SCISETINT register while the sciDisableNotification() is used to clear these bits. Would you please elaborate what is TBR? 

  • Oh, so that does do what I want. Excellent.

    I misunderstood the functionality. I thought that each function sets the entirety of the input flags, not just the specified bit. Yes, if the function merely enables or disables the specified bit, then there is absolutely no need for the read.

    RBF and TBE are holdovers from the Intel 80386EX processor code from which I am upgrading to the more modern TI RM48L952ZWT. RBF is "Receive Buffer Full" and TBE is "Transmit Buffer Empty". I mis-typed earlier. TBR would be Transmit Buffer Ready, but Intel uses TBE. Texas Instruments uses "ready" for both, so when I was typing I said TBR, not TBE. All acronyms sound alike anyways. Heaven forbid engineering as a whole spell things out, way too easy. What would engineering be without acronym soup?