Dual sampling of ADCS using processor triggered interrupts

Hi there,

I'm trying to simultaneously sample the ADCs ADC0 and ADC1 on the tiva tm4c1294 micro controller. When I print the values over UART after connecting 3.3V to the input PE3 on the board this value is read as 4095 but the value for the second ADC is 3873 whereas if I connect 3.3v into the input PE2 on the board the second ADC reads 4095 and the first 3873. I was wondering if anyone could help me find what would be causing this issue. I'm trying to sample both ADCs at a rate of 1Msp/s, which I would think would require me to OR the additional 'ADC_TRIGGER_WAIT' and 'ADC_TRIGGER_SIGNAL' flags into the ADCProcessor trigger call however this causes my code to get stuck. The following is the code I am working with (Based of the single_ended.c example):

uint32_t pui32ADC0Value[1];
uint32_t pui32ADC1Value[1];

int
main(void)
{

    // Clock the board of a 120MHz clock source
    g_ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
                                             SYSCTL_OSC_MAIN |
                                             SYSCTL_USE_PLL |
                                             SYSCTL_CFG_VCO_480), 120000000);

    //Configure the UART
    ConfigureUART();
    UARTprintf("ADC sampling\n");

    // Enable ADC0 and ADC1 peripherals
    SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC1);

    // Enable GPIO PORT E
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);

    //Set clock sources for the ADCs to 32MHz source
    ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 15);

    // Set GPIO PE3 and PE2 as analogue inputs AIN0 and AIN1
    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_3);
    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_2);

    // Trigger on processor
    ADCSequenceConfigure(ADC0_BASE, 3, ADC_TRIGGER_PROCESSOR, 0);
    ADCSequenceConfigure(ADC1_BASE, 3, ADC_TRIGGER_PROCESSOR, 0);
    //
    // Configure step 0 on sequence 3.  Sample channel 0 (ADC_CTL_CH0) in
    // single-ended mode (default) and configure the interrupt flag
    // (ADC_CTL_IE) to be set when the sample is done.  Tell the ADC logic
    // that this is the last conversion on sequence 3 (ADC_CTL_END).  Sequence
    // 3 has only one programmable step.  Sequence 1 and 2 have 4 steps, and
    // sequence 0 has 8 programmable steps.  Since we are only doing a single
    // conversion using sequence 3 we will only configure step 0.  For more
    // information on the ADC sequences and steps, reference the datasheet.
    //

    //Configure only step 0 (Sequencer 3 has a single step)
    ADCSequenceStepConfigure(ADC0_BASE, 3, 0, ADC_CTL_CH0| ADC_CTL_IE |
                             ADC_CTL_END);
    ADCSequenceStepConfigure(ADC1_BASE, 3, 0, ADC_CTL_CH1 | ADC_CTL_IE |
                             ADC_CTL_END);

    // Enable sequencer 3 on each module
    ADCSequenceEnable(ADC0_BASE, 3);
    ADCSequenceEnable(ADC1_BASE, 3);

    // Clear the interrupt status flag.  This is done to make sure the
    // interrupt flag is cleared before we sample.
    ADCIntClear(ADC0_BASE, 3);
    ADCIntClear(ADC1_BASE, 3);

//    //Enable processor interrupts
    IntMasterEnable();

    while(1){
        //
        // Trigger the sample sequence.
        //
        ADCProcessorTrigger(ADC0_BASE, 3);

        //
        // Wait until the sample sequence has completed.
        //
        while(!ADCIntStatus(ADC0_BASE, 3, false))
        {
        }

        ADCIntClear(ADC0_BASE, 3);

        ADCSequenceDataGet(ADC0_BASE, 3, pui32ADC0Value);

        ADCProcessorTrigger(ADC1_BASE, 3);

        while(!ADCIntStatus(ADC1_BASE, 3, false))
        {
        }

        ADCIntClear(ADC1_BASE, 3);

        ADCSequenceDataGet(ADC1_BASE, 3, pui32ADC1Value);
        
        UARTprintf("AIN0 = %4d AIN1 = %4d\r", pui32ADC0Value[0], pui32ADC1Value[0]);
    }