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PBIST Memory Grouping

Other Parts Discussed in Thread: TMS570LC4357

Hello TI

In the PBIST Memory Grouping in TMS570lc4357, what are the AWM1 and AWM2 peripheral memory indicating to? Also the memory group CPGMAC_STATE_RXADDR, CPGMAC_CPPI and CPGMAC_STAT_FIFO ? Please elaborate on what Micro Snooping Control Unit does on TMS570lc4357?

  • AWM1,AWM2 are the MibADC buffer memories.

    the CPGMAC are for the ethernet mac.

    the micro snooping unit is the 'ACP' described in the Cortex R5 TRM:

    9.8. Accelerator Coherency Port interface
    The optional Accelerator Coherency Port (ACP) provides memory coherency as introduced in Coherency between each CPU in the Cortex-R5 group and an external master.

    Best to read the TRM from ARM's website for detailed description of how this works but basically the DMA writes pass through this port and if the DMA is going to write to any location that is cached the ACP will invalidate the cache line so that the next time the CPU reads the location - it reads the updated value written by the DMA rather than the out of date cached value.