Unable to Write to (most of) Flash on EK-TM4C129XL Launchpad

Brian Duemmer

Other Parts Discussed in Thread: EK-TM4C1294XL, TM4C1294NCPDT

Hello all,

I have recently unboxed a new EK-TM4C1294XL Launchpad. I have successfully been able to load on the simple example programs provided through TivaWare. However, when I tried to load an example TI-RTOS project (the basic hello world one), the upload would fail, saying:

CORTEX_M4_0: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.

I checked both the linker command file and the device memory map, and both were consistent with the memory addresses given in the datasheet. Because of this, I disabled verification of errors in the project properties, and deployed anyway. The program did not work, and upon inspection of the registers, I noticed that the Undefined Instruction Usage Fault bit in the NVIC_FAULT_STAT register had been set. After some more time and research, I looked in the memory browser and disassembly view, and saw that all of the flash memory after address 0x786 was empty (0xFFF...), including a large part of the deployed code. I power cycled the board, changed USB cables, and restarted Code Composer Studio multiple times, but none of it worked. Upon downloading smaller applications (ie. less than 0x786 bytes long) they worked fine.

Attached I have the source directory of the broken project, flash memory save, and CPU peripheral registers save.

CCS version: 6.1.3.00033

Compiler version: TI v15.12.1.LTS

TI-RTOS version: 2.16.1.14

TivaWare version: 2.1.2.111

OS: Windows 7 64 bit

Any help would be most appreciated,

Brian Duemmer

BrokenProject.zip

over 9 years ago

0 Amit Ashara over 9 years ago

TI__Guru**** 244400 points

Hello Brian

If the example binaries in TivaWare works as expected then the issue is not with the device as the programs uses more that 0x786 address space.

What does the map file show. All locations that should be flashed must be within 0x0-0x10.0000 address space.

Regards
Amit

0 Brian Duemmer over 9 years ago in reply to Amit Ashara

Prodigy 80 points

Hello Amit

Below is the contents of the device map file :

/* tm4c1294ncpdt.gel
*
* Revisions:
* June-10-2014 3rd revision
*
* This is derived from revision 15071 of the TivaWare Library.
*
*/

menuitem "StartUp"

hotmenu StartUp()
{
/* Load the CortexM3_util.gel file */
GEL_LoadGel("$(GEL_file_dir)/CortexM3_util.gel");

GEL_MapOff();
GEL_MapReset();
GEL_MapOn();
memorymap_init();
}

OnTargetConnect()
{
}

memorymap_init()
{
/*
* Syntax for GEL_MapAddStr.
* GEL_MapAddStr(address, page, length, "attribute", waitstate);

Basic Attribute Types Derived Attribute Types
String Description String Description
R Read NONE No memory/protected
W Write RAM Read and write
P Port ROM Read only
EX External WOM Write only
EM Emulator INPORT Port read only
PR Programmable OUTPORT Port write only
ER Erasable IOPORT Port read and write
DA Dual access SARAM Single access RAM
ASn Access size DARAM Dual access RAM
SHnC Shared FLASH Flash ROM
CACHE Cache EXRAM External RAM
TX Text EXROM External ROM
MN Monitor EPROM Erasable write-able EPROM
SA Single access MONITOR Monitor ROM
FL Flash PRAM Program RAM
MR Memory mapped PROM Program ROM
NULL NULL NULL NULL

*/

GEL_MapAddStr(0x00000000, 0, 0x00100000, "R", 0); /* Flash */
GEL_MapAddStr(0x01000000, 0, 0x00008c00, "R", 0); /* ROM */
GEL_MapAddStr(0x20000000, 0, 0x00040000, "R|W", 0); /* SRAM */
GEL_MapAddStr(0x40000000, 0, 0x00001000, "R|W", 0); /* WATCHDOG0 */
GEL_MapAddStr(0x40001000, 0, 0x00001000, "R|W", 0); /* WATCHDOG1 */
GEL_MapAddStr(0x40008000, 0, 0x00001000, "R|W", 0); /* SSI0 */
GEL_MapAddStr(0x40009000, 0, 0x00001000, "R|W", 0); /* SSI1 */
GEL_MapAddStr(0x4000A000, 0, 0x00001000, "R|W", 0); /* SSI2 */
GEL_MapAddStr(0x4000B000, 0, 0x00001000, "R|W", 0); /* SSI3 */
GEL_MapAddStr(0x4000C000, 0, 0x00001000, "R|W", 0); /* UART0 */
GEL_MapAddStr(0x4000D000, 0, 0x00001000, "R|W", 0); /* UART1 */
GEL_MapAddStr(0x4000E000, 0, 0x00001000, "R|W", 0); /* UART2 */
GEL_MapAddStr(0x4000F000, 0, 0x00001000, "R|W", 0); /* UART3 */
GEL_MapAddStr(0x40010000, 0, 0x00001000, "R|W", 0); /* UART4 */
GEL_MapAddStr(0x40011000, 0, 0x00001000, "R|W", 0); /* UART5 */
GEL_MapAddStr(0x40012000, 0, 0x00001000, "R|W", 0); /* UART6 */
GEL_MapAddStr(0x40013000, 0, 0x00001000, "R|W", 0); /* UART7 */
GEL_MapAddStr(0x40020000, 0, 0x00001000, "R|W", 0); /* I2C0 */
GEL_MapAddStr(0x40021000, 0, 0x00001000, "R|W", 0); /* I2C1 */
GEL_MapAddStr(0x40022000, 0, 0x00001000, "R|W", 0); /* I2C2 */
GEL_MapAddStr(0x40023000, 0, 0x00001000, "R|W", 0); /* I2C3 */
GEL_MapAddStr(0x40028000, 0, 0x00001000, "R|W", 0); /* PWM0 */
GEL_MapAddStr(0x4002C000, 0, 0x00001000, "R|W", 0); /* QEI0 */
GEL_MapAddStr(0x40030000, 0, 0x00001000, "R|W", 0); /* TIMER0 */
GEL_MapAddStr(0x40031000, 0, 0x00001000, "R|W", 0); /* TIMER1 */
GEL_MapAddStr(0x40032000, 0, 0x00001000, "R|W", 0); /* TIMER2 */
GEL_MapAddStr(0x40033000, 0, 0x00001000, "R|W", 0); /* TIMER3 */
GEL_MapAddStr(0x40034000, 0, 0x00001000, "R|W", 0); /* TIMER4 */
GEL_MapAddStr(0x40035000, 0, 0x00001000, "R|W", 0); /* TIMER5 */
GEL_MapAddStr(0x40038000, 0, 0x00001000, "R|W", 0); /* ADC0 */
GEL_MapAddStr(0x40039000, 0, 0x00001000, "R|W", 0); /* ADC1 */
GEL_MapAddStr(0x4003C000, 0, 0x00001000, "R|W", 0); /* COMP */
GEL_MapAddStr(0x40040000, 0, 0x00001000, "R|W", 0); /* CAN0 */
GEL_MapAddStr(0x40041000, 0, 0x00001000, "R|W", 0); /* CAN1 */
GEL_MapAddStr(0x40050000, 0, 0x00001000, "R|W", 0); /* USB0 */
GEL_MapAddStr(0x40058000, 0, 0x00001000, "R|W", 0); /* GPIO PORTA AHB */
GEL_MapAddStr(0x40059000, 0, 0x00001000, "R|W", 0); /* GPIO PORTB AHB */
GEL_MapAddStr(0x4005A000, 0, 0x00001000, "R|W", 0); /* GPIO PORTC AHB */
GEL_MapAddStr(0x4005B000, 0, 0x00001000, "R|W", 0); /* GPIO PORTD AHB */
GEL_MapAddStr(0x4005C000, 0, 0x00001000, "R|W", 0); /* GPIO PORTE AHB */
GEL_MapAddStr(0x4005D000, 0, 0x00001000, "R|W", 0); /* GPIO PORTF AHB */
GEL_MapAddStr(0x4005E000, 0, 0x00001000, "R|W", 0); /* GPIO PORTG AHB */
GEL_MapAddStr(0x4005F000, 0, 0x00001000, "R|W", 0); /* GPIO PORTH AHB */
GEL_MapAddStr(0x40060000, 0, 0x00001000, "R|W", 0); /* GPIO PORTJ AHB */
GEL_MapAddStr(0x40061000, 0, 0x00001000, "R|W", 0); /* GPIO PORTK */
GEL_MapAddStr(0x40062000, 0, 0x00001000, "R|W", 0); /* GPIO PORTL */
GEL_MapAddStr(0x40063000, 0, 0x00001000, "R|W", 0); /* GPIO PORTM */
GEL_MapAddStr(0x40064000, 0, 0x00001000, "R|W", 0); /* GPIO PORTN */
GEL_MapAddStr(0x40065000, 0, 0x00001000, "R|W", 0); /* GPIO PORTP */
GEL_MapAddStr(0x40066000, 0, 0x00001000, "R|W", 0); /* GPIO PORTQ */
GEL_MapAddStr(0x400AF000, 0, 0x00001000, "R|W", 0); /* EEPROM */
GEL_MapAddStr(0x400B8000, 0, 0x00001000, "R|W", 0); /* I2C8 */
GEL_MapAddStr(0x400B9000, 0, 0x00001000, "R|W", 0); /* I2C9 */
GEL_MapAddStr(0x400C0000, 0, 0x00001000, "R|W", 0); /* I2C4 */
GEL_MapAddStr(0x400C1000, 0, 0x00001000, "R|W", 0); /* I2C5 */
GEL_MapAddStr(0x400C2000, 0, 0x00001000, "R|W", 0); /* I2C6 */
GEL_MapAddStr(0x400C3000, 0, 0x00001000, "R|W", 0); /* I2C7 */
GEL_MapAddStr(0x400D0000, 0, 0x00001000, "R|W", 0); /* EPI0 */
GEL_MapAddStr(0x400E0000, 0, 0x00001000, "R|W", 0); /* TIMER6 */
GEL_MapAddStr(0x400E1000, 0, 0x00001000, "R|W", 0); /* TIMER7 */
GEL_MapAddStr(0x400EC000, 0, 0x00001000, "R|W", 0); /* EMAC0 */
GEL_MapAddStr(0x400F9000, 0, 0x00001000, "R|W", 0); /* SYSEXC */
GEL_MapAddStr(0x400FC000, 0, 0x00001000, "R|W", 0); /* HIB */
GEL_MapAddStr(0x400FD000, 0, 0x00001000, "R|W", 0); /* FLASH CTRL */
GEL_MapAddStr(0x400FE000, 0, 0x00001000, "R|W", 0); /* SYSCTL */
GEL_MapAddStr(0x400FF000, 0, 0x00001000, "R|W", 0); /* UDMA */
GEL_MapAddStr(0x44030000, 0, 0x00001000, "R|W", 0); /* CCM0 */
GEL_MapAddStr(0xE000E000, 0, 0x00001000, "R|W", 0); /* NVIC */

GEL_TextOut("\nMemory Map Initialization Complete\n");

}

The flash memory allocation above is consistent with the datasheet. I should mention, however, that only flash memory seems to be affected by this, not SRAM and peripheral registers.

Brian

0 Chester Gillon over 9 years ago

Guru 92251 points

Brian Duemmer said:
Attached I have the source directory of the broken project, flash memory save, and CPU peripheral registers save.

I took the hello_EK_TM4C1294XL_TI_TivaTM4C1294NCPDT.out from your project, and using CCS 6.1.3 under Linux was successfully able to flash the run the program into a EK-TM4C1294XL. Looking at the hello_EK_TM4C1294XL_TI_TivaTM4C1294NCPDT.map from your project I can't see any problems with the addresses used.

Brian Duemmer said:
However, when I tried to load an example TI-RTOS project (the basic hello world one), the upload would fail, saying:
CORTEX_M4_0: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.

Since I can't repeat the problem with your hello_EK_TM4C1294XL_TI_TivaTM4C1294NCPDT.out program, can you try enabling Debug Server Logging and post the log file. The debug server log may highlight which address the CORTEX_M4_0: Loader is rejecting.

0 Brian Duemmer over 9 years ago in reply to Chester Gillon

Prodigy 80 points

Hello Chester,

Attached is the debug server data, along with two screenshots of the IDE in debug mode, showing disassembly, some of the core registers, and the boot.asm file. According to the disassembly view, CCS thinks that there is code in the area past the "critical region", and when the code enters the processor tries to execute instructions from unset flash, and throws the unhandled instruction fault immediately after entering. In the second image, the execution jumps to what I believe is the default Fault ISR handler, and gets stuck in an infinite loop.

Brian

CCSlogData.zip

0 Amit Ashara over 9 years ago in reply to Brian Duemmer

TI__Guru**** 244400 points

Hello Brian

The file that you sent earlier is a GEL file and not the map file which is generated by the linker.

Regards
Amit

0 Chester Gillon over 9 years ago in reply to Amit Ashara

Guru 92251 points

Amit Ashara said:
The file that you sent earlier is a GEL file and not the map file which is generated by the linker.

Agreed, but the linker map file is in the zip file attached to the first post. I can't see a problem with the addresses in the map file, which was confirmed by being able to flash the .out file in the zip file attached to the first post and so I think the program is valid but there is some other problem in CCS.

0 Chester Gillon over 9 years ago in reply to Brian Duemmer

Guru 92251 points

Brian Duemmer said:
Attached is the debug server data, along with two screenshots of the IDE in debug mode, showing disassembly, some of the core registers, and the boot.asm file.

From looking at the debug server log I think the problem is that CCS doesn't attempt to write the program to flash at all thus leaving the flash contents from a previous program, rather than a partial flash write.

Searching for "CORTEX_M4_0 FLASH" strings in your debug server log shows the following, which indicates theFlashOperations::MatchFlashDLL() function failed :

0x0002ACE8 123935 3 CORTEX_M4_0 FLASH I: FlashProgrammerManager::Constructor
0x0002ACE8 124371 3 CORTEX_M4_0 FLASH I: Enqueuing a call to FlashOperations::Initialize() on a side thread
0x00031EE0 124371 3 CORTEX_M4_0 FLASH I: FlashOperations::Constructor
0x00031EE0 124371 3 CORTEX_M4_0 FLASH C: FlashOperations::Initialize()
0x00031EE0 124371 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), isSimulator = false
0x00031EE0 124371 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), targetType = TMS470REX
0x00031EE0 124371 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), fullpath = Stellaris In-Circuit Debug Interface/CORTEX_M4_0
0x00031EE0 124371 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), targetVariant = TM4C1294NCPDT
0x00031EE0 124371 3 CORTEX_M4_0 FLASH C: FlashOperations::MatchFlashDLL( Flash DLL Delegate, TMS470REX, TM4C1294NCPDT, C:\ti\ccsv6\ccs_base\DebugServer\bin\ )
0x00031EE0 124372 3 CORTEX_M4_0 FLASH R: FlashOperations::MatchFlashDLL() = false, DLL name = , m_bNeedsFlashProperties = false, m_bNeedsFlashUtility = false, m_iBackupType = 0
0x00031EE0 124372 3 CORTEX_M4_0 FLASH R: FlashOperations::Initialize(), Flash programming not supported on current device.
0x00031EE0 124372 3 CORTEX_M4_0 FLASH R: FlashOperations::Initialize()
0x0002ACE8 124888 3 CORTEX_M4_0 FLASH C: FlashProgrammerManager::TargetSupported()
0x0002ACE8 124888 3 CORTEX_M4_0 FLASH R: FlashProgrammerManager::TargetSupported() = false
0x0002ACE8 124889 3 CORTEX_M4_0 FLASH C: FlashProgrammerManager::TargetSupported()
0x0002ACE8 124889 3 CORTEX_M4_0 FLASH R: FlashProgrammerManager::TargetSupported() = false

Whereas the deubg server log taken from a successfully download in my CCS 6.1.3 running under Windows 7 starts with the following "CORTEX_M4_0 FLASH" entries which showsFlashOperations::MatchFlashDLL() being successful :

0x000010F0 238730 3 CORTEX_M4_0 FLASH I: FlashProgrammerManager::Constructor
0x000010F0 242359 3 CORTEX_M4_0 FLASH I: Enqueuing a call to FlashOperations::Initialize() on a side thread
0x00000FDC 242359 3 CORTEX_M4_0 FLASH I: FlashOperations::Constructor
0x00000FDC 242359 3 CORTEX_M4_0 FLASH C: FlashOperations::Initialize()
0x00000FDC 242359 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), isSimulator = false
0x00000FDC 242359 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), targetType = TMS470REX
0x00000FDC 242359 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), fullpath = Stellaris In-Circuit Debug Interface_0/CORTEX_M4_0
0x00000FDC 242359 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), targetVariant = TM4C1294NCPDT
0x00000FDC 242359 3 CORTEX_M4_0 FLASH C: FlashOperations::MatchFlashDLL( JTAG, TMS470REX, TM4C1294NCPDT, C:\ti_ccs6_1_3\ccsv6\ccs_base\DebugServer\bin\ )
0x00000FDC 242374 3 CORTEX_M4_0 FLASH R: FlashOperations::MatchFlashDLL() = true, DLL name = FlashStellaris, m_bNeedsFlashProperties = true, m_bNeedsFlashUtility = true, m_iBackupType = 0
0x00000FDC 242374 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), DLL path: C:\ti_ccs6_1_3\ccsv6\ccs_base\DebugServer\bin\FlashStellaris.dll
0x00000FDC 242374 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), DLL Load Successful
0x00000FDC 242374 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), Utility object was created.
0x00000FDC 242374 3 CORTEX_M4_0 FLASH I: FlashOperations::Initialize(), Entry point found

Given that with your CCS 6.1.3 installation other programs can be downloaded, not sure what causes the failure with the TI-RTOS example. It is possible you have found a CCS bug which only shows up under certain conditions. Maybe you should post this on the Code Composer Studio forum.

0 Brian Duemmer over 9 years ago in reply to Chester Gillon

Prodigy 80 points

Thank you all for your help, will repost this on Code Composer Studio forum.

Brian

0 Amit Ashara over 9 years ago in reply to Chester Gillon

TI__Guru**** 244400 points

Thank you Chester...

Regards
Amit

0 Chester Gillon over 9 years ago in reply to Brian Duemmer

Guru 92251 points

For anyone who finds this thread in future, the solution is on the Code Composer Studio thread Unable to Write to (most of) Flash on EK-TM4C129XL Launchpad. The problem was that after adding and removing a UART connection from the CCS target configuration, CCS got "confused" and attempted to program the Tiva flash via a serial interface rather than JTAG which failed with a confusing error message.

The work-around was to delete the cached information in the .launches subdirectory of the CCS project and restart CCS.

0 Amit Ashara over 9 years ago in reply to Chester Gillon

TI__Guru**** 244400 points

Hello Chester,

That sounds like a CCS bug!!!

Regards
Amit

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Unable to Write to (most of) Flash on EK-TM4C129XL Launchpad