DMA TM4C129 - working with ADC0 not ADC1

Daniel daniel

Hello Guys,

I have ADC0 working with DMA, sampling the temp sensor on a 129x. I want to get ADC1 working with DMA. I would like to get them working together, but first, I cannot even get ADC1 working with DMA Independently.

here is my project, working with ADC0 and DMA: ADC0-DMA-working.zip

here is the code, for ADC1 and DMA.I pretty much commented the ADC0, and replaced it with ADC1 equivalent. I know DMA is not working, because when I place a breakpoint on like 384, after uDMAChannelEnable(UDMA_CHANNEL_ADC1); and ADCIntEnableEx(ADC1_BASE, ADC_INT_DMA_SS0), and then check the buffer, nothing is in it.

here is the project: ADC1-DMA-notworking.zip

here is the code:

#include <stdbool.h>


#include <stdint.h>



#include "inc/hw_ints.h"


#include "inc/hw_memmap.h"


#include "inc/hw_adc.h"


#include "inc/hw_types.h"


#include "inc/hw_udma.h"


#include "inc/hw_emac.h"


#include "driverlib/debug.h"


#include "driverlib/gpio.h"


#include "driverlib/interrupt.h"


#include "driverlib/pin_map.h"


#include "driverlib/rom.h"


#include "driverlib/sysctl.h"


#include "driverlib/uart.h"


#include "driverlib/adc.h"


#include "driverlib/udma.h"


#include "driverlib/emac.h"



uint32_t gui32ADC0Value[2];

uint32_t gui32ADC1Value[2];

volatile uint32_t gui32ADCIntDone[2];


#pragma DATA_ALIGN(pui8ControlTable, 1024)

uint8_t pui8ControlTable[1024];



#define MEM_BUFFER_SIZE         256

static uint32_t g_ui8RxBufA[MEM_BUFFER_SIZE*5];

static uint32_t g_ui8RxBufB[MEM_BUFFER_SIZE*5];



//*****************************************************************************

//

//! \addtogroup adc_examples_list

//! <h1>Single Ended ADC (single_ended)</h1>

//!

//

//*****************************************************************************

void

uDMAErrorHandler(void)

{

    uint32_t ui32Status;


    //

    // Check for uDMA error bit

    //

    ui32Status = uDMAErrorStatusGet();


    //

    // If there is a uDMA error, then clear the error and increment

    // the error counter.

    //

    if(ui32Status)

    {

        uDMAErrorStatusClear();


    }

}




volatile int counter= 0;

void ADCseq0Handler(){
    uint32_t ui32Status;
    uint32_t ui32Mode;

//    ADCIntClearEx(ADC0_BASE, ADC_INT_DMA_SS0);
    ADCIntClearEx(ADC1_BASE, ADC_INT_DMA_SS0);



    //ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT);
    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT);


    if(ui32Mode == UDMA_MODE_STOP)

    {



//
//    	uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,
//
//                                   UDMA_MODE_PINGPONG,
//
//                                   (void *)(ADC0_BASE + ADC_O_SSFIFO0),
//
//                                   g_ui8RxBufA, MEM_BUFFER_SIZE);


    	uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,

                                   UDMA_MODE_PINGPONG,

                                   (void *)(ADC1_BASE + ADC_O_SSFIFO1),

                                   g_ui8RxBufA, MEM_BUFFER_SIZE);



    }



    //ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT);
    ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT);


    if(ui32Mode == UDMA_MODE_STOP)

    {

    // 	test2(&counter, &enable);

//     	uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT,
//
//                                    UDMA_MODE_PINGPONG,
//
//                                    (void *)(ADC0_BASE + ADC_O_SSFIFO0),
//
//									 g_ui8RxBufA, MEM_BUFFER_SIZE);
     	uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT,

                                    UDMA_MODE_PINGPONG,

                                    (void *)(ADC1_BASE + ADC_O_SSFIFO1),

									 g_ui8RxBufA, MEM_BUFFER_SIZE);


      //  counter++;
    }

    //uDMAChannelEnable(UDMA_CHANNEL_ADC0);
    uDMAChannelEnable(UDMA_CHANNEL_ADC1);

}



void

InitUART1Transfer(uint32_t sysclock)

{
	  uint32_t div;






	    //SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
	    SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC1);

	    //SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_ADC0);
	    SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_ADC1);




	    //ADCClockConfigSet(ADC0_BASE,         ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 1);
	    ADCClockConfigSet(ADC1_BASE,         ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 1);





//	    ADCSequenceConfigure(ADC0_BASE, 0 /*SS0*/, ADC_TRIGGER_ALWAYS, 3 /*priority*/);  // SS0-SS3 priorities must always be different
	    ADCSequenceConfigure(ADC1_BASE, 0 /*SS0*/, ADC_TRIGGER_ALWAYS, 3 /*priority*/);  // SS0-SS3 priorities must always be different


	     //ADCSequenceStepConfigure(ADC0_BASE, 0 /*SS0*/, 0, ADC_CTL_TS);  // ADC_CTL_TS = read temp sensor
	     ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 0, ADC_CTL_TS);  // ADC_CTL_TS = read temp sensor


	    //ADCSequenceStepConfigure(ADC0_ASE, 0 /*SS0*/, 1, ADC_CTL_TS);
	    ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 1, ADC_CTL_TS);


	     //ADCSequenceStepConfigure(ADC0_BASE, 0 /*SS0*/, 2, ADC_CTL_TS);
	     ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 2, ADC_CTL_TS);


	     //ADCSequenceStepConfigure(ADC0_BASE, 0 /*SS0*/, 3, ADC_CTL_TS);
	     ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 3, ADC_CTL_TS);


	     //ADCSequenceStepConfigure(ADC0_BASE, 0 /*SS0*/, 4, ADC_CTL_TS);
	     ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 4, ADC_CTL_TS);


	     //ADCSequenceStepConfigure(ADC0_BASE, 0 /*SS0*/, 5, ADC_CTL_TS);
	     ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 5, ADC_CTL_TS);


	     //ADCSequenceStepConfigure(ADC0_BASE, 0 /*SS0*/, 6, ADC_CTL_TS);
	     ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 6, ADC_CTL_TS);


	     //ADCSequenceStepConfigure(ADC0_BASE, 0 /*SS0*/, 7, ADC_CTL_TS | ADC_CTL_END | ADC_CTL_IE);   // ADC_CTL_IE fires every 8 samples
	     ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 7, ADC_CTL_TS | ADC_CTL_END | ADC_CTL_IE);   // ADC_CTL_IE fires every 8 samples



	     //ADCSequenceEnable(ADC0_BASE, 0);
	     ADCSequenceEnable(ADC1_BASE, 0);


	    //ADCSequenceDMAEnable(ADC0_BASE, 0);
	    ADCSequenceDMAEnable(ADC1_BASE, 0);






//	    uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC0,
//
//	                                    UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
//
//	                                    UDMA_ATTR_HIGH_PRIORITY |
//
//	                                    UDMA_ATTR_REQMASK);
//
//
	    uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC1,

	                                    UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |

	                                    UDMA_ATTR_HIGH_PRIORITY |

	                                    UDMA_ATTR_REQMASK);





//	    uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,
//
//	                            UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
//
//	                              UDMA_ARB_8);
	    uDMAChannelControlSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,

	                            UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |

	                              UDMA_ARB_8);


//	    uDMAChannelControlSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT,
//
//	                            UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
//
//								UDMA_ARB_8);
	    uDMAChannelControlSet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT,

	                            UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |

								UDMA_ARB_8);



//	    uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_PRI_SELECT,
//
//	                               UDMA_MODE_PINGPONG,
//
//	                               (void *)(ADC0_BASE + ADC_O_SSFIFO0),
//
//	                               g_ui8RxBufA, MEM_BUFFER_SIZE);
	    uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,

	                               UDMA_MODE_PINGPONG,

	                               (void *)(ADC1_BASE + ADC_O_SSFIFO1),

	                               g_ui8RxBufA, MEM_BUFFER_SIZE);


//	    uDMAChannelTransferSet(UDMA_CHANNEL_ADC0 | UDMA_ALT_SELECT,
//
//	                                UDMA_MODE_PINGPONG,
//
//	                                (void *)(ADC0_BASE + ADC_O_SSFIFO0),
//
//									g_ui8RxBufA, MEM_BUFFER_SIZE);
	    uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT,

	                                UDMA_MODE_PINGPONG,

	                                (void *)(ADC1_BASE + ADC_O_SSFIFO1),

									g_ui8RxBufA, MEM_BUFFER_SIZE);


//	    uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC0,
//	    UDMA_ATTR_ALTSELECT |
//	    UDMA_ATTR_HIGH_PRIORITY);
	    uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC1,
	    UDMA_ATTR_ALTSELECT |
	    UDMA_ATTR_HIGH_PRIORITY);

//	    uDMAChannelEnable(UDMA_CHANNEL_ADC0);
	    uDMAChannelEnable(UDMA_CHANNEL_ADC1);


//	    ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS0);
	    ADCIntEnableEx(ADC1_BASE, ADC_INT_DMA_SS0);


//	    IntEnable(INT_ADC0SS0);
	    IntEnable(INT_ADC1SS0);



}



int

main(void)

{



        uint32_t sysclock;



        sysclock = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |

                                              SYSCTL_OSC_MAIN |

                                              SYSCTL_USE_PLL |

                                              SYSCTL_CFG_VCO_480), 120000000);


     SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);

     SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UDMA);

     IntMasterEnable();

      IntEnable(INT_UDMAERR);

      uDMAEnable();



      uDMAControlBaseSet(pui8ControlTable);



      InitUART1Transfer(sysclock);





    while(1)

    {


    }

}





Thanks
Daniel

over 9 years ago

0 Amit Ashara over 9 years ago

TI__Guru**** 244400 points

Hello Daniel,

As in the other post on the same issue that you were running

1. Did you try to see if ADC1 works with the CPU reading the data?
2. Then did you try to see if the ADC1 works with DMA in Basic Mode?

Regards
Amit

0 Daniel daniel over 9 years ago in reply to Amit Ashara

Intellectual 330 points

Hello Amit,

Thanks for your fast reply!!! this situation is quite urgent for me to solve.

ADC1 does work trigger by a timer, here is the code:

0 Amit Ashara over 9 years ago in reply to Daniel daniel

TI__Guru**** 244400 points

Hello Daniel

Two contradictory configurations. The timer expects timer trigger but the processor is initiating the conversion.

ADCSequenceConfigure(ADC1_BASE, 0, ADC_TRIGGER_TIMER, 0);

ADCProcessorTrigger(ADC1_BASE, 0);

And the interrupt will come from the ADC and not the timer when you must read the data.

First check the basic configuration examples in TivaWare, change it from ADC0 to ADC1 and then include DMA.

Regards
Amit

0 Daniel daniel over 9 years ago in reply to Amit Ashara

Intellectual 330 points

Hello Amit,

Thanks for your suggestions. I have done what you said:

here is the ADC1 firing with an interrupt: ADC1-works.zip

the code:

//---------------------------------------------------------------------------------
// Project: Blink TM4C BIOS Using Hwi (SOLUTION)
// Author: Eric Wilbur
// Date: June 2014
//
// Note: The function call TimerIntClear(TIMER2_BASE, TIMER_TIMA_TIMEOUT) HAS
//       to be in the ISR. This fxn clears the TIMER's interrupt flag coming
//       from the peripheral - it does NOT clear the CPU interrupt flag - that
//       is done by hardware. The author struggled figuring this part out - hence
//       the note. And, in the Swi lab, this fxn must be placed in the
//       Timer_ISR fxn because it will be the new ISR.
//
// Follow these steps to create this project in CCSv6.0:
// 1. Project -> New CCS Project
// 2. Select Template:
//    - TI-RTOS for Tiva-C -> Driver Examples -> EK-TM4C123 LP -> Example Projects ->
//      Empty Project
//    - Empty Project contains full instrumentation (UIA, RTOS Analyzer) and
//      paths set up for the TI-RTOS version of MSP430Ware
// 3. Delete the following files:
//    - Board.h, empty.c, EK_TM4C123GXL.c/h, empty_readme.txt
// 4. Add main.c from TI-RTOS Workshop Solution file for this lab
// 5. Edit empty.cfg as needed (to add/subtract) BIOS services, delete given Task
// 6. Build, load, run...
//----------------------------------------------------------------------------------

//----------------------------------------
// BIOS header files
//----------------------------------------
#include <xdc/std.h>  						//mandatory - have to include first, for BIOS types
#include <ti/sysbios/BIOS.h> 				//mandatory - if you call APIs like BIOS_start()
#include <xdc/runtime/Log.h>				//needed for any Log_info() call
#include <xdc/cfg/global.h> 				//header file for statically defined objects/handles

//------------------------------------------
// TivaWare Header Files
//------------------------------------------
#include <stdint.h>
#include <stdbool.h>

#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"
#include "inc/hw_ints.h"
#include "driverlib/interrupt.h"
#include "driverlib/timer.h"

#include <stdint.h>
#include <stdbool.h>
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/debug.h"
#include "driverlib/sysctl.h"
#include "driverlib/adc.h"
//----------------------------------------
// Prototypes
//----------------------------------------
void hardware_init(void);
void ledToggle(void);

//---------------------------------------
// Globals
//---------------------------------------
volatile int16_t i16ToggleCount = 0;

//---------------------------------------------------------------------------
// main()
//---------------------------------------------------------------------------
void main(void) {

	hardware_init();							// init hardware via Xware

	BIOS_start();

}

//---------------------------------------------------------------------------
// hardware_init()
//
// inits GPIO pins for toggling the LED
//---------------------------------------------------------------------------
void hardware_init(void) {
	uint32_t ui32Period;

	uint32_t clock_rate = SysCtlClockFreqSet(
			(SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL
					| SYSCTL_CFG_VCO_480), 120000000);

	SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC1);

	ADCClockConfigSet(ADC1_BASE, ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 1);

	ADCSequenceConfigure(ADC1_BASE, 0 /*SS0*/, ADC_TRIGGER_ALWAYS,
			3 /*priority*/);  // SS0-SS3 priorities must always be different

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 0, ADC_CTL_TS); // ADC_CTL_TS = read temp sensor

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 1, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 2, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 3, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 4, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 5, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 6, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 7,
			ADC_CTL_TS | ADC_CTL_END | ADC_CTL_IE); // ADC_CTL_IE fires every 8 samples

	ADCSequenceEnable(ADC1_BASE, 0);

	ADCIntEnable(ADC1_BASE, 0);

}

volatile uint32_t gui32ADC0Value[10];
void ledToggle(void) {

	ADCIntClear(ADC1_BASE, 0);
	ADCSequenceDataGet(ADC1_BASE, 0, gui32ADC0Value);

	Log_info1("LED TOGGLED [%u] TIMES",i16ToggleCount);	// send toggle count to UIA

}

everythings works, I can read samples.

Now, when I switch it over to DMA, the interrupt fires, but DMA doesn't work (the if statements are never entered). Thanks

ADC1-not-working-withDMA.zip

the code:

//---------------------------------------------------------------------------------
// Project: Blink TM4C BIOS Using Hwi (SOLUTION)
// Author: Eric Wilbur
// Date: June 2014
//
// Note: The function call TimerIntClear(TIMER2_BASE, TIMER_TIMA_TIMEOUT) HAS
//       to be in the ISR. This fxn clears the TIMER's interrupt flag coming
//       from the peripheral - it does NOT clear the CPU interrupt flag - that
//       is done by hardware. The author struggled figuring this part out - hence
//       the note. And, in the Swi lab, this fxn must be placed in the
//       Timer_ISR fxn because it will be the new ISR.
//
// Follow these steps to create this project in CCSv6.0:
// 1. Project -> New CCS Project
// 2. Select Template:
//    - TI-RTOS for Tiva-C -> Driver Examples -> EK-TM4C123 LP -> Example Projects ->
//      Empty Project
//    - Empty Project contains full instrumentation (UIA, RTOS Analyzer) and
//      paths set up for the TI-RTOS version of MSP430Ware
// 3. Delete the following files:
//    - Board.h, empty.c, EK_TM4C123GXL.c/h, empty_readme.txt
// 4. Add main.c from TI-RTOS Workshop Solution file for this lab
// 5. Edit empty.cfg as needed (to add/subtract) BIOS services, delete given Task
// 6. Build, load, run...
//----------------------------------------------------------------------------------

//----------------------------------------
// BIOS header files
//----------------------------------------

#include <xdc/std.h>  						//mandatory - have to include first, for BIOS types
#include <ti/sysbios/BIOS.h> 				//mandatory - if you call APIs like BIOS_start()
#include <xdc/runtime/Log.h>				//needed for any Log_info() call
#include <xdc/cfg/global.h> 				//header file for statically defined objects/handles

//------------------------------------------
// TivaWare Header Files
//------------------------------------------
#include <stdint.h>
#include <stdbool.h>

#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"
#include "inc/hw_ints.h"
#include "driverlib/interrupt.h"
#include "driverlib/timer.h"

#include <stdint.h>
#include <stdbool.h>
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/debug.h"
#include "driverlib/sysctl.h"
#include "driverlib/adc.h"
#include "inc/hw_udma.h"

#include "inc/hw_adc.h"

//-----------------#include <stdint.h>
#include <stdbool.h>
#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "inc/hw_uart.h"
#include "driverlib/fpu.h"
#include "driverlib/gpio.h"
#include "driverlib/interrupt.h"
#include "driverlib/pin_map.h"
#include "driverlib/rom.h"
#include "driverlib/rom_map.h"
#include "driverlib/sysctl.h"
#include "driverlib/systick.h"
#include "driverlib/uart.h"
#include "driverlib/udma.h"
#include "utils/cpu_usage.h"
#include "utils/uartstdio.h"
#include "utils/ustdlib.h"-----------------------
// Prototypes
//----------------------------------------
void hardware_init(void);
void ledToggle(void);

#pragma DATA_ALIGN(pui8ControlTable, 1024)

uint8_t pui8ControlTable[1024];

#define MEM_BUFFER_SIZE         256

static uint32_t g_ui8RxBufA[MEM_BUFFER_SIZE * 5];

//---------------------------------------
// Globals
//---------------------------------------
volatile int16_t i16ToggleCount = 0;

//---------------------------------------------------------------------------
// main()
//---------------------------------------------------------------------------
void main(void) {

	hardware_init();							// init hardware via Xware

	BIOS_start();

}

//---------------------------------------------------------------------------
// hardware_init()
//
// inits GPIO pins for toggling the LED
//---------------------------------------------------------------------------
void hardware_init(void) {
	uint32_t ui32Period;

	uint32_t clock_rate = SysCtlClockFreqSet(
			(SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL
					| SYSCTL_CFG_VCO_480), 120000000);

	SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);

	SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UDMA);

	IntMasterEnable();

	uDMAEnable();

	uDMAControlBaseSet(pui8ControlTable);

	SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC1);
	SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_ADC1);

	ADCClockConfigSet(ADC1_BASE, ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 1);

	ADCSequenceConfigure(ADC1_BASE, 0 /*SS0*/, ADC_TRIGGER_ALWAYS,	3 /*priority*/);  // SS0-SS3 priorities must always be different

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 0, ADC_CTL_TS); // ADC_CTL_TS = read temp sensor

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 1, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 2, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 3, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 4, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 5, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 6, ADC_CTL_TS);

	ADCSequenceStepConfigure(ADC1_BASE, 0 /*SS0*/, 7, ADC_CTL_TS | ADC_CTL_END | ADC_CTL_IE); // ADC_CTL_IE fires every 8 samples

	ADCSequenceEnable(ADC1_BASE, 0);
	ADCSequenceDMAEnable(ADC1_BASE, 0);

	uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC1,
	UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
	UDMA_ATTR_HIGH_PRIORITY |
	UDMA_ATTR_REQMASK);

	uDMAChannelControlSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,
	UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
	UDMA_ARB_8);

	uDMAChannelControlSet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT,
	UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
	UDMA_ARB_8);

	uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,
	UDMA_MODE_PINGPONG,
	(void *) (ADC1_BASE + ADC_O_SSFIFO1),
	g_ui8RxBufA, MEM_BUFFER_SIZE);

	uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT,
	UDMA_MODE_PINGPONG,
	(void *) (ADC1_BASE + ADC_O_SSFIFO1),
	g_ui8RxBufA, MEM_BUFFER_SIZE);

	uDMAChannelAttributeEnable(UDMA_CHANNEL_ADC1,
	UDMA_ATTR_ALTSELECT |
	UDMA_ATTR_HIGH_PRIORITY);

	uDMAChannelEnable(UDMA_CHANNEL_ADC1);
	ADCIntEnableEx(ADC1_BASE, ADC_INT_DMA_SS0);
	ADCIntEnable(ADC1_BASE, 0);

}

//---------------------------------------------------------------------------
// ledToggle()
//
// toggles LED on Tiva-C LaunchPad
//---------------------------------------------------------------------------
volatile uint32_t gui32ADC0Value[10];
void ledToggle(void) {
	uint32_t ui32Status;
	uint32_t ui32Mode;

	ADCIntClearEx(ADC1_BASE, ADC_INT_DMA_SS0);

	ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT);

	if (ui32Mode == UDMA_MODE_STOP)

	{

		uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,

		UDMA_MODE_PINGPONG,

		(void *) (ADC1_BASE + ADC_O_SSFIFO1),

		g_ui8RxBufA, MEM_BUFFER_SIZE);

	}

	ui32Mode = uDMAChannelModeGet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT);

	if (ui32Mode == UDMA_MODE_STOP)

	{

		uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT,

		UDMA_MODE_PINGPONG,

		(void *) (ADC1_BASE + ADC_O_SSFIFO1),

		g_ui8RxBufA, MEM_BUFFER_SIZE);

	}

	uDMAChannelEnable(UDMA_CHANNEL_ADC1);

}

could it be something wit?

ADCIntEnableEx(ADC1_BASE, ADC_INT_DMA_SS0);

uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT,
UDMA_MODE_PINGPONG,
(void *) (ADC1_BASE + ADC_O_SSFIFO1),
g_ui8RxBufA, MEM_BUFFER_SIZE);

Thanks Daniel

0 Amit Ashara over 9 years ago in reply to Daniel daniel

TI__Guru**** 244400 points

Hello Daniel,

There is no way you can hit a moving target. One piece at a time. You just changed the trigger to always mode losing control during debug.

Please, 1 step at a time. Move it to processor trigger. Then check when the interrupt is fired(which brings up the point that the IntEnable API call is missing) the DMA control table (for which the earlier forum thread had the name of the register which can be used to find the address of the control table) shows that the control table entry is set to STOP mode and on re-initialization it is again in PING PONG mode.

Also even before PING PONG, you must get the BASIC mode working first...

Daniel, one step at a time...

Regards
Amit

0 Daniel daniel over 9 years ago in reply to Daniel daniel

Intellectual 330 points

Hello Amit.

Thanks for your help, this forum post helped me resolve my issue: e2e.ti.com/.../510292

Thanks
Daniel

Arm-based microcontrollers

Arm-based microcontrollers forum

DMA TM4C129 - working with ADC0 not ADC1